• The Journal of Korean Institute of Communications and Information Sciences
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• v.37A no.10
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• pp.815-820
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• 2012

We introduce two-dimensional soft output Viterbi algorithm (2D SOVA) and iterative 2D SOVA for holographic data storage. Since the holographic data storage is 2D intersymbol interference (ISI) channel, the 2D detection schemes have good performance at holographic data storage. The 2D SOVA and iterative 2D SOVA are 2D detection schemes. We introduce and compare the two 2D detection schemes. The 2D SOVA is approximately 2 dB better than one-dimensional (1D) detection scheme, and iterative 2D SOVA is approximately 1 dB better than the 2D SOVA. In contrast, the iterative 2D SOVA is approximately twice complex higher than 2D SOVA, and 2D SOVA is approximately twice complex higher than 1D detection scheme.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.3
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• pp.384-389
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• 2003

A new two-step soft-output Viterbi algorithm (SOVA) decoder architecture is presented. A significant reduction in the decoding latency can be achieved through the use of the dual-port RAM in the survivor memory structure of the trace-back unit. The system complexity can be lowered due to the determination of the absolute value of the path metric differences inside the add-compare-select (ACS) unit. The proposed SOVA architecture was verified successfully by the functional simulation of Verilog HDL modeling and the FPGA prototyping. The SOVA decoder achieves a data rate very close to that of the conventional Viterbi Algorithm (VA) decoder and the resource consumption of the realized SOVA decoder is only one and a half times larger than that of the conventional VA decoder.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6C
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• pp.438-443
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• 2008

The efficient method to implement the Max-Log-MAP algorithm is proposed by modifying the conventional algorithm. It is called a parallel soft output Viterbi algorithm (SOVA) and the rigorous proof is given for the equivalence between the Max-Log-MAP algorithm and the parallel SOVA. The parallel SOVA is compared with the conventional algorithms and we show that it is an efficient algorithm implementing the modified SOVA in parallel.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.11
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• pp.14-23
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• 2002

Two implementation methods for SOVA (Soft Output Viterbi Algorithm)of Turbo decoder are applied and verfied. The first method is the combination of a trace back (TB) logic for the survivor state and a double trace back logic for the weight value in two-step SOVA. This architecure of two-setp SOVA decoder allows important savings in area and high-speed processing compared with that of one-step SOVA decoding using register exchange (RE) or trace-back (TB) method. Second method is adjusting the reliability value with a scaling factor between 0.25 and 0.33 in order to compensate for the distortion for a rate 1/3 and 8-state SOVA decoder with a 256-bit frame size. The proposed schemes contributed to higher SNR performance by 2dB at the BER 10E-4 than that of SOVA decoder without a scaling factor. In order to verify the suggested schemes, the SOVA decoder is testd using Xillinx XCV 1000E FPGA, which runs at 33.6MHz of the maximum speed with 845 latencies and it features 175K gates in the case of 256-bit frame size.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.157-160
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• 2000

In order to design a low complexity and high performance SOVA decoder for Turbo Codes, we need to analyze the decoding performance with respect to several important design parameters and find out optimal values for them. Thus, we use a scaling factor of soft output and a update depth as the parameters and analyze their effect on the BER performance of the SOVA decoder. finally, we shows the optimal values of them for maximum decoding performance of SOVA decoder for 3GPP complied Turbo codes.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11C
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• pp.1045-1051
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• 2003

The SOVA, which produces the soft decision value, can be used as a sub-optimum solution for concatenated codes such as turbo codes, since it is computationally efficient compared with the optimum MAP algorithm. In this paper, we propose an efficient implementation of the SOVA used for decoding turbo codes, by reducing the number of calculations for soft decision values and trace-back operations. In order to utilize the memory efficiently, the whole block of turbo codes is divided into several sub-blocks in the proposed algorithm. It is demonstrated that the proposed algorithm requires less computation than the conventional algorithm, while providing the same overall performance.

• Journal of Communications and Networks
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• v.5 no.1
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• pp.1-6
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• 2003

In this paper, we extend the derivation of the iterative soft-output Viterbi algorithm (SOVA) for partial response (PR) channels, and modify its decoding process such that it works consistently for arbitrary high code rates, e.g., rate 64/65. We show that the modified SOVA always outperforms the conventional SOVA that appears in the literature with a significant difference for high code rates. It also offers a significant cut down in the trace-back computations. We further examine its performance for parallel and serial concatenated codes on a precoded Class IC partial response (PR4) channel. Code rates of the form $\frac{k_0}{k_0+1}$($k_0$ = 4, 8, and 64) are considered. Our simulations indicate that the loss suffered by the modified SOVA, relative to the APP algorithm, is consistent for all code rates and is at most 1.2 dB for parallel concatenations and at most 1.6 dB for serial concatenations at $P_b$ = $10^{-5}$.

• Proceedings of the KIEE Conference
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• 2000.07d
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• pp.3157-3159
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• 2000

Soft Output Viterbi Algorithm is modification of Viterbi algorithm to deliver not only the decoded codewords but also a posteriori probability for each bit. This paper presents SOVA decoder which can be used for component decoder of turbo decoder. We used two-step SMU architectures combined with systolic array traceback methods to reduce the complexity of the design. We followed the specification of CDMA2000 system for SOVA decoder design.

• Journal of IKEEE
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• v.4 no.2 s.7
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• pp.257-265
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• 2000

Turbo Code decoder is an iterate decoding technology, which extracts extrinsic information from the bit to be decoded by calculating both forward and backward metrics in each decoding step, and uses the information to the next decoding step. Viterbi decoder, which is for a convolutional code, runs continuous mode, while Turbo Code decoder runs by block unit. There are algorithms used in a decoder : which are MAP(maximum a posteriori) algorithm requiring very complicated calculation and SOVA(soft output Viterbi algorithm) using Viterbi algorithm suggested by Hagenauer, and it is known that the decoding performance of MAP is better. The result of this make experimentation shows that the performance of SOVA, which has half complex algorithm compare to MAP, is almost same as the performance of MAP when the SOVA decoding performance is supplemented with Robust equalization techniques.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.5B
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• pp.592-598
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• 2001

IMT-2000에서는 이미 터보코드가 채널코딩 기법으로 제안되어 있으며 특별히 3GPP 규격에서는 제한길이 4인 1/3 터보코드가 채택되어 있다. 기존의 논문에서는 일반적인 터보 코드의 성능에 대한 분석이 많이 제시되어 왔으나, 3GPP 규격의 터보 복호를 위한 SOVA 복호기의 성능 파라미터 추출과 그에 따른 성능 분석 수행되지 않았다. 본 연구에서는 효율적인 구조의 3GPP SOVA 복호기를 설계하기 위해서 외부정보의 스케일링과 신뢰도 갱신길이 라는 두 가지 파라미터에 따른 SOVA 복호기의 성능을 분석하고 최적의 파라미터 값을 제시하고자 한다. 이 파라미터의 최적화를 위하여 C++를 이용한 모의실험 결과, 3GPP 규격의 (13,15) 1/3 코드에서 스케일링 값은 1/2로 신뢰도 갱신길이는 10으로 최적화 되었다.