• 대한금속재료학회지
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• 제46권2호
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• pp.58-64
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• 2008

Surface-void defects observed on the galvannealed(GA) steel sheets in Interstitial-free high-strengthened steels containing Si and Mn have been investigated using the combination of the FIB(Focused Ion Beam) and FE-TEM(Field Emission-Transmission Electron Microscope) techniques. The scanning ion micrographs of cross-section microstructure of defects showed that these defects were identified as craters which were formed on the projecting part of the substrate surface. Also, those craters were formed on the Si or Mn-Si oxides film through the whole interface between galvannealed coating and steel substrate. Interface enrichments and oxidations of the active alloying elements such as Si and Mn during reduction annealing process for galvanizing were found to interrupt Zn and Fe interdiffusion during galvannealing process. During galvannealing, Zn and Fe interdiffusion is preferentially started on the clean substrate surface which have no oxide layer on. And then, during galvannealing, crater is developed with consumption of molten zinc on the oxide layer.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2003년도 춘계학술발표강연 및 논문개요집
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• pp.99-99
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• 2003

The growth of GaN on Si is of great interest due to the several advantages : low cost, large size and high-quality wafer availability as well as its matured technology. The crystal quality of GaN is known to be much influenced by the surface pretreatment of Si substrate[1]. In this work, the properties of GaN overlayer grown on ion beam modified Si(111) have been investigated. Si(111) surface was treated RIB with 1KeV-N$_2$$\^$+/(at 1.9 ${\times}$ 10$\^$-5/) to dose ranging from 5${\times}$10$\^$15/ to 1${\times}$10$\^$17/ prior to film growth. GaN epilayers were grown at 1100$^{\circ}C$ for 1 hour after growing AlN buffer layers for 5∼30 minutes at 1100$^{\circ}C$ in Metal Organic Chemical Vapor Deposition (MOCVD). The properties of GaN epilayers were evaluated by X-Ray Diffraction(XRD), Raman spectroscopy, Photoluminescence(PL) and Hall measurement. The results showed that the ion modified treatment markedly affected to the structural, optical and electrical characteristic of GaN layers.

• 한국재료학회지
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• 제9권3호
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• pp.257-262
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• 1999

MOCVD를 이용하여 $SiO_2$로 패턴된 GaN/sapphire 기판상에서 $NH_3$유량과 성장온도가 GaN 성장의 선택성과 성장 특성에 미치는 영향을 조사하였다. $NH_3$유량을 500~1300sccm, 성장온도를 $950~1060^{\circ}C$로 변화시켜 성장변수에 따른 영향을 주사전자현미경으로 관찰하였다.$NH_3$유량이 증가할수록 성장선택성이 향상되었으나 기판윈도우에서 성장되는 GaN 형상변화에는 큰 영향을 미치지 못하였다. 성장온도가 높을수록 GaN의 성장선택성이 향상됨이 관찰되었다. 패턴 모양을 원형, 선형, 방사선모양(선형 패턴을 30, $45^{\circ}$로 회전)으로 제작하여 GaN 성장을 수행한 후 관찰한 결과 {1101}으로 이루어진 Hexagonal 피라밋 형상과 마스크층 위로의 측면성장을 얻을 수 있었으며, 성장조건에 따른 <1100>와 <1210>의 방향으로의 측면성장속도의 차이를 관찰할 수 있었다.

• 한국재료학회지
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• 제3권6호
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• pp.645-651
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• 1993

Bulk반절연 기판 웨이퍼에 이온 주입법에 의한 기존의 GaAs집적회로 제작시 발생하는 문제점을 보완하고자 반절연 기판 위에 반절연성의 고저항 GaAs 에피층을 성장하는 연구를 수행하였다. 먼저 반절연 기판의 EPD분포를 조사하고, MOCVD와 MBE법을 이용하여 undeped GaAs반절연성 에피층을 성장시켜 실제 집적회로의 제작에 적합한지를 평가하였다. 평가방법은 반절연성 에피\ulcorner을 buffer층으로 성장시킨 에피 기판에 ungated FET를 제작하여, 이 반절연성 에피\ulcorner을 통한 누설전류를 측정하고, 또한 반절연 기판의 EP분호의 영향을 조사하였다. 누설 전류의 측정결과 비교적 주설 전류가 큰 1$\mu\textrm{m}$ 두께의 MOCVD시료에서도 270nA/mm로 FET의 pinch-off에는 영향을 주지 못하는 매우 작은 누설 전류 값을 나타내었다. 또한 누설전류의 분포가 반절연 기판의 EPD분포와 일치하는 것을 발견하여, 에피층의 quality에 기판의 결함이 미치는 영향을 확인하였다. MBE법으로 성장한 2$\mu\textrm{m}$ 두께의 undoped burrer층 시료는 휠씬 좋은 특성을 나타내었으며, 매우 균일하고 낮은 누설전류(40nA/mm)가 측정되었다.

• 한국전기전자재료학회논문지
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• 제25권2호
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• pp.121-124
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• 2012

The characteristics of Ga-doped zinc oxide (GZO) thin films deposited at different deposition temperatures (TS~250 to $550^{\circ}C$) on 4H-SiC have been investigated. Structural and electrical properties of GZO thin film on n-type 4H-SiC(0001) were investigated by using x-ray diffraction(XRD), atomic force microscopy(AFM), Hall effect measurement, barrier height from I-V curve and Auger electron spectroscopy(AES). XRD $2\theta$ scan shows GZO thin film has preferential orientation with c-axis perpendicular to SiC substrate surface. The lowest resistivity ($\sim1.9{\times}10^{-4}{\Omega}cm$) was observed for the GZO thin film deposited at $400^{\circ}C$. As deposition temperature increases, barrier height between GZO and SiC was increased. Whereas, resistivity of GZO thin films as well as barrier height between GZO and SiC were increased after annealing process in air atmosphere. It has been found that the c-axis oriented crystalline quality as well as the relative amount of activated Ga3+ ions and oxygen vacancy may affect the electrical properties of GZO films on SiC.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 하계종합학술대회 논문집
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• pp.895-898
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• 1999

Recently, small signal modeling of CMOS device becomes more difficult because the design rule goes into deep submicron. De-embedding of substrate parameters is important in order to use CMOS devices at RF frequencies. In this paper, we suggest a new de-embedding model with refined physical meaning and accuracy. In GaAs IC’s, the substrate is almost an insulator but Si substrate has the semiconducting characteristics. It offers some troubles if it is treated like GaAs substrate. The conducting substrate is modeled with five resistances, which leads to very accurate modeling so long as the pad layout is symmetrical. Frequency range is up to 39㎓ and fitting accuracy is as small as 0.00037 on least square errors.

• 한국전기전자재료학회논문지
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• 제16권12S호
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• pp.1242-1247
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• 2003

In order to passivate the GaAs surface, silicon-nitride films were fabricated by using laser CVD method. SiH$_4$ and NH$_3$ were used to obtain SiN films in the range of 100∼300$^{\circ}C$ on p-type (100) GaAs substrate. To determine interface characteristics of the metal-insulator-GaAs structure, electrical measurements were performed such as C-V curves and deep level transient spectroscopy (DLTS). The results show that the hysteresis was reduced and interface trap density was lowered to 1,012 ∼ 1,013 at 100 ∼ 200$^{\circ}C$. According to the study of surface leakage current, the passivated CaAs has less leakage current compared to non-passivated substrate.

• 한국결정성장학회지
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• 제12권6호
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• pp.283-287
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• 2002

초고집적 반도체 회로에서 Cu를 배선으로 쓰이기 위한 Cu 금속과 Si 기판사이의 확산방지막으로써 Zr(Si)N 박막을 연구하였다. Zr(Si)N 박막증착은 DC magnetron sputter으로 $Ar/N_2$의 혼합 gas를 사용한 reactive sputtering 방법을 이용하였다. 상온에서 ZrN 박막 증착시 Ar gas와 NE gas 비율이 48 : 2일 때 가장 낮은 비저항값을 가졌으며, 증착시 기판의 온도의 증가에 따라서 비저항값이 낮아졌다. 비저항값이 감소된 ZrN 박막일수록 (002)면의 방향성을 갖는 결정이 성장되었다. ZrN 박막의 Cu 확산방지 특성은 ZrN 박막에 Si을 첨가함으로써 개선될 수 있으며 지나치게 첨가될 경우에는 오히려 확산방지 특성이 감소되었다. 접착력 특성에서는 ZrN에 Si의 함유량이 증가함에 파라 개선되었다. 증착막의 특성은 XRD, 광학 현미경, scretch tester 그리고 $\alpha$-step 등을 사용하여 분석하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권3호
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• pp.131-135
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• 2006

High electron mobility transistors with InAs channels and antimonide barriers were grown on Si and GaAs substrates by means of molecular beam epitaxy. While direct growth of Sb materials on Si substrate generates disordered and coalescences 3-D growth, smooth and mirror-like 2D growth can be repeatedly obtained by inserting AlSb QD layers between them. Room-temperature electron mobilities of over 10,000 $cm^2/V-s$ and 20,000 $cm^2/v-s$ can be routinely obtained on Si and GaAs substrates, respectively, after optimizing the buffer structure as well as maintaining InSb-like interface.

• 대한전자공학회논문지
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• 제27권1호
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• pp.68-73
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• 1990

GaAs epilayer was grown on Si(100) substrate using the two-step growth method by MBE. The crystal growth mode have been investigated by RHEED. The hydrogenation effects of GaAs epilayer were studied by DLTS and Raman spectroscopy. The four electron traps in GaAs/Si layer were observed and their activation energy ranged from 0.47 eV to 0.81 eV below the conduction band. After hydrogenation at 250\ulcorner for 3 hours, new trap not observed and electron traps at Ec-0.68, 0.54 and 0.47 eV were almost passivated. Whereas the Ec-0.81 eV level showed no significant change in concentration. From Raman measurement, GaAs epilayer is found to be influenced by the tensile stress.