• Title/Summary/Keyword: SAD(Sum of Absolute Difference)

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Novel Motion Estimation Technique Based Error-Resilient Video Coding (새로운 움직임 예측기법 기반의 에러 내성이 있는 영상 부호화)

  • Hwang, Min-Cheol;Kim, Jun-Hyung;Ko, Sung-Jea
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.46 no.4
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    • pp.108-115
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    • 2009
  • In this paper, we propose a novel true-motion estimation technique supporting efficient frame error concealment for error-resilient video coding. In general, it is important to accurately obtain the true-motion of objects in video sequences for effectively recovering the corrupted frame due to transmission errors. However, the conventional motion estimation (ME) technique, which minimizes a sum of absolute different (SAD) between pixels of the current block and the motion-compensated block, does not always reflect the true-movement of objects. To solve this problem, we introduce a new metric called an absolute difference of motion vectors (ADMV) which is the distance between motion vectors of the current block and its motion-compensated block. The proposed ME method can prevent unreliable motion vectors by minimizing the weighted combination of SAD and ADMV. In addition, the proposed ME method can significantly improve the performance of error concealment at the decoder since error concealment using the ADMV can effectively recover the missing motion vector without any information of the lost frame. Experimental results show that the proposed method provides similar coding efficiency to the conventional ME method and outperforms the existing error-resilient method.

A Content Adaptive Fast PDE Algorithm for Motion Estimation Based on Matching Error Prediction

  • Lee, Sang-Keun;Park, Eun-Jeong
    • Journal of Communications and Networks
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    • v.12 no.1
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    • pp.5-10
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    • 2010
  • This paper introduces a new fast motion estimation based on estimating a block matching error (i.e., sum of absolute difference (SAD)) between blocks which can eliminate an impossible candidate block much earlier than a conventional partial distortion elimination (PDE) scheme. The basic idea of the proposed scheme is based on predicting the total SAD of a candidate block using its partial SAD. In particular, in order to improve prediction accuracy and computational efficiency, a sub-sample based block matching and a selective pixel-based approaches are employed. In order to evaluate the proposed scheme, several baseline approaches are described and compared. The experimental results show that the proposed algorithm can reduce the computations by about 44% for motion estimation at the cost of 0.0005 dB quality degradation versus the general PDE algorithm.

SAD-Based Reordering of Feature Map Sequence for VCM (VCM 을 위한 SAD 기반 특징맵 시퀀스 재배열)

  • Kim, Dong-Ha;Yoon, Yong-Uk;Kim, Jae-Gon
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • fall
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    • pp.30-32
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    • 2021
  • 최근 머신비전 임무(machine vision task)를 위해 기계에 소비되는 비디오가 증가하면서 MPEG 은 기계를 위한 비디오 부호화 표준으로 VCM(Video Coding for Machine) 표준화 진행하고 있다. VCM 은 기계분석 네트워크에 입력되는 비디오 또는 특징(feature)을 부/복호화하여 압축 대비 임무 수행 정확도를 평가한다. 본 논문은 기계분석 네트워크에서 추출한 특징 데이터를 기존의 비디오 코덱을 사용하여 부/복호화를 진행할 때, 각 채널의 특징맵을 SAD(Sum of Absolute Difference) 기반으로 재배열하는 방법을 제안한다. 제안기법은 VCM 의 기준성능(anchor)에는 미치지 못하지만, 채널 재배열하지 않은 특징을 비디오 코덱으로 부호화 할 때 보다 개선된 성능을 보인다.

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A Motion Estimation Method Using a New Cost Function for Frame Rate Up Conversion (프레임 율 변환을 위한 새로운 비용함수를 사용한 움직임 추정 기법)

  • Lee, Hanee;Choi, Dooseop;Wee, Seounghyun;Kim, Taejeong
    • Proceedings of the Korea Information Processing Society Conference
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    • 2010.11a
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    • pp.613-616
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    • 2010
  • 본 논문에서는 새로운 움직임 추정(motion estimation, ME) 방식을 사용한 프레임 비율 변환(frame rate conversion, FRC) 기법에 대해 제안한다. 기존의 프레임 비율 변환을 위한 움직임 추정 방식은 영상 압축에서 사용되고 있는 SAD를 사용하여 블록(block) 단위로 움직임 벡터를 추정하는 방식에 기초를 두고 있다. 그러나 잔여 신호(residual signal)를 저장하는 영상 압축과 달리, 잘못된 움직임 추정은 합성된 출력 영상에서 심각한 품질 저하를 가져올 수 있다. 이를 보완하기 위해 움직임 개선(motion refinement, MR)이 사용되고 있지만, 근본적인 해결을 위해서는 정확한 움직임 추정 알고리즘 사용이 필요하다. 특히 SAD를 통한 움직임 추정은 고르지 못한 움직임 벡터장(motion vector field, MVF)을 형성할 수 있으며, 종래의 연구에서 이를 해결하기 위해 SAD(sum of absolute difference)에 벡터의 공간제약(spatial constraint) 항목을 추가하여 비교적 고른 움직임 벡터장을 형성하는 방식이 제시되었다. SAD와 공간 제약 항목의 반영 비율에 따라 움직임 벡터의 중요성과 움직임 벡터장의 일관성이 서로 상충하는데, 기존의 방식은 이 비율을 일정한 상수(constant)값을 사용하고 있으며, 이러한 방식은 이미지의 특성에 따라 결과가 달라진다. 본 논문에서는 SAD와 공간 제약 항목 사이의 반영 비율을 이미지의 특성에 적응하는 방식을 사용하는 움직임 예측을 제시하고, 수행한 결과를 기존의 방식에 의한 결과와 비교하였다.

A Multi-Coordinate Sprite Generation scheme based on Prediction error from sprite (스프라이트로부터의 예측 오차에 기반한 다좌표계 스프라이트 생성기법)

  • 백춘삼;김휘용;김성대
    • Proceedings of the IEEK Conference
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    • 2000.09a
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    • pp.321-324
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    • 2000
  • 본 논문에서는 새로운 방식의 스프라이트 생성 방법을 논하였다 스프라이트로부터 원 영상을 예측해 그 오차(SAD : Sum of Absolute Difference)를 제어하는 방법으로 다좌표계 스프라이트(MCS : Multi-Coordinate Sprite)를 제안하였다. 예측 오차를 제어함으로써 기존에 제안된 방법으로 생성된 정적 스프라이트 보다 좋은 화질을 갖는 원 영상을 예측할 수 있음을 보여준다. 특히, MCS 생성 기법은 기존의 방법으로 생성된 스프라이트로부터 영상을 예측했을 때 화질 열화가 심한 카메라의 확대 움직임이 심한 영상들을 포함한 영상열에 대해서도 제한된 오차를 갖는 원 영상을 복원해 낼 수 있다는 것을 보여준다.

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Enhanced Binary Block Matching Method for Constrained One-bit Transform based Motion Estimation (개선된 이진 블록 매칭 방법을 사용한 제한된 1비트 변환 알고리듬 기반 움직임 추정)

  • Kim, Hyungdo;Jeong, Jechang
    • Journal of Broadcast Engineering
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    • v.20 no.2
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    • pp.257-264
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    • 2015
  • In this paper, Enhanced binary block matching method for Constrained one-bit transform (C1BT) based motion estimation is proposed. Binary motion estimation exploits the Number of non-matched points (NNMP) as a block matching criterion instead of the Sum of Absolute Differences (SAD) for low complex motion estimation. The motion estimation using SAD could use the smaller block for more accurate motion estimation. In this paper the enhanced binary block matching method using smaller motion estimation block for C1BT is proposed to the more accurate binary matching. Experimental results shows that the proposed algorithm has better Peak Signal to Noise Ration (PSNR) results compared with conventional binary transform algorithms.

A Fast Search Algorithm for Sub-Pixel Motion Estimation (부화소 움직임 추정을 위한 고속 탐색 기법)

  • Park, Dong-Kyun;Jo, Seong-Hyeon;Cho, Hyo-Moon;Lee, Jong-Hwa
    • Proceedings of the KIEE Conference
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    • 2007.04a
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    • pp.26-28
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    • 2007
  • The motion estimation is the most important technique in the image compression of the video standards. In the case of next generation standards in the video codec as H.264, a high compression-efficiency can be also obtained by using a motion compensation. To obtain the accurate motion search, a motion estimation should be achieved up to 1/2 pixel and 1/4 pixel uiuts. To do this, the computational complexity is increased although the image compression rate is increased. Therefore, in this paper, we propose the advanced sub-pixel block matching algorithm to reduce the computational complexity by using a statistical characteristics of SAD(Sum of Absolute Difference). Generally, the probability of the minimum SAD values is high when searching point is in the distance 1 from the reference point. Thus, we reduced the searching area and then we can overcome the computational complexity problem. The main concept of proposed algorithm, which based on TSS(Three Step Search) method, first we find three minimum SAD points which is in integer distance unit, and then, in second step, the optimal point is in 1/2 pixel unit either between the most minimum SAD value point and the second minimum SAD point or between the most minimum SAD value point and the third minimum SAD point In third step, after finding the smallest SAD value between two SAD values on 1/2 pixel unit, the final optimized point is between the most minimum SAD value and the result value of the third step, in 1/2 pixel unit i.e., 1/4 pixel unit in totally. The conventional TSS method needs an eight.. search points in the sub-pixel steps in 1/2 pixel unit and also an eight search points in 1/4 pixel, to detect the optimal point. However, in proposed algorithm, only total five search points are needed. In the result. 23 % improvement of processing speed is obtained.

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A Study on Motion Estimation Encoder Supporting Variable Block Size for H.264/AVC (H.264/AVC용 가변 블록 크기를 지원하는 움직임 추정 부호기의 연구)

  • Kim, Won-Sam;Sohn, Seung-Il
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.10
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    • pp.1845-1852
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    • 2008
  • The key elements of inter prediction are motion estimation(ME) and motion compensation(MC). Motion estimation is to find the optimum motion vectors, not only by using a distance criteria like the SAD, but also by taking into account the resulting number of 비트s in the 비트 stream. Motion compensation is compensate for movement of blocks of current frame. Inter-prediction Encoding is always the main bottleneck in high-quality streaming applications. Therefore, in real-time streaming applications, dedicated hardware for executing Inter-prediction is required. In this paper, we studied a motion estimator(ME) for H.264/AVC. The designed motion estimator is based on 2-D systolic array and it connects processing elements for fast SAD(Sum of Absolute Difference) calculation in parallel. By providing different path for the upper and lower lesion of each reference data and adjusting the input sequence, consecutive calculation for motion estimation is executed without pipeline stall. With data reuse technique, it reduces memory access, and there is no extra delay for finding optimal partitions and motion vectors. The motion estimator supports variable-block size and takes 328 cycles for macro-block calculation. The proposed architecture is local memory-free different from paper [6] using local memory. This motion estimation encoder can be applicable to real-time video processing.

A Systolic Array for High-Speed Computing of Full Search Block Matching Algorithm

  • Jung, Soon-Ho;Woo, Chong-Ho
    • Journal of Korea Multimedia Society
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    • v.14 no.10
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    • pp.1275-1286
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    • 2011
  • This paper proposes a high speed systolic array architecture for full search block matching algorithm (FBMA). The pixels of the search area for a reference block are input only one time to find the matched candidate block and reused to compute the sum of absolute difference (SAD) for the adjacent candidate blocks. Each row of designed 2-dimensional systolic array compares the reference block with the adjacent blocks of the same row in search area. The lower rows of the designed array get the pixels from the upper row and compute the SAD with reusing the overlapped pixels of the candidate blocks within same column of the search area. This designed array has no data broadcasting and global paths. The comparison with existing architectures shows that this array is superior in terms of throughput through it requires a little more hardware.

An Efficient Hardware-Software Co-Implementation of an H.263 Video Codec (하드웨어 소프트웨어 통합 설계에 의한 H.263 동영상 코덱 구현)

  • 장성규;김성득;이재헌;정의철;최건영;김종대;나종범
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.4B
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    • pp.771-782
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    • 2000
  • In this paper, an H.263 video codec is implemented by adopting the concept of hardware and software co-design. Each module of the codec is investigated to find which approach between hardware and software is better to achieve real-time processing speed as well as flexibility. The hardware portion includes motion-related engines, such as motion estimation and compensation, and a memory control part. The remaining portion of theH.263 video codec is implemented in software using a RISC processor. This paper also introduces efficient design methods for hardware and software modules. In hardware, an area-efficient architecture for the motion estimator of a multi-resolution block matching algorithm using multiple candidates and spatial correlation in motion vector fields (MRMCS), is suggested to reduce the chip size. Software optimization techniques are also explored by using the statistics of transformed coefficients and the minimum sum of absolute difference (SAD)obtained from the motion estimator.

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