• 제목/요약/키워드: S pre-annealing

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Effect of Pre-annealing on the Formation of Cu2ZnSn(S,Se)4 Thin Films from a Se-containing Cu/SnSe2/ZnSe2 Precursor

  • Ko, Young Min;Kim, Sung Tae;Ko, Jae Hyuck;Ahn, Byung Tae;Chalapathy, R.B.V.
    • Current Photovoltaic Research
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    • 제10권2호
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    • pp.39-48
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    • 2022
  • A Se-containing Cu/SnSe2/ZnSe precursor was employed to introduce S to the precursor to form Cu2ZnSn(S,Se)4 (CZTSSe) film. The morphology of CZTSSe films strongly varied with two different pre-annealing environments: S and N2. The CZTSSe film with S pre-annealing showed a dense morphology with a smooth surface, while that with N2 pre-annealing showed a porous film with a plate-shaped grains on the surface. CuS and Cu2Sn(S,Se)3 phases formed during the S pre-annealing stage, while SnSe and Cu2SnSe3 phases formed during the N2 pre-annealing stage. The SnSe phase formed during N2 pre-annealing generated SnS2 phase that had plate shape and severely aggravated the morphology of CZTSSe film. The power conversion efficiency of the CZTSSe solar cell with S pre-annealing was low (1.9%) due to existence of Zn(S.Se) layer between CZTSSe and Mo substrate. The results indicated that S pre-annealing of the precursor was a promising method to achieve a good morphology for large area application.

KCN 에칭 및 CdS 후열처리가 Cu(In,Ga)(S,Se)2 광흡수층 성능에 미치는 영향 (Effect of Pre/Post-Treatment on the Performance of Cu(In,Ga)(S,Se)2 Absorber Layer Manufactured in a Two-Step Process)

  • 김아현;이경아;전찬욱
    • 신재생에너지
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    • 제17권4호
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    • pp.36-45
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    • 2021
  • To remove the Cu secondary phase remaining on the surface of a CIGSSe absorber layer manufactured by the two-step process, KCN etching was applied before depositing the CdS buffer layer. In addition, it was possible to increase the conversion efficiency by air annealing after forming the CdS buffer layer. In this study, various pre-treatment/post-treatment conditions wereapplied to the S-containing CIGSSe absorber layerbefore and after formation of the CdS buffer layer to experimentally confirm whether similareffects as those of Se-terminated CIGSe were exhibited. Contrary to expectations, it was noted that CdS air annealing had negative effects.

Effects of TCA Incorporation During Annealing Process on the Properties of Oxygen Ion Implanted Silicon Wafers

  • Bae, Y.H;Kwon, Y.K.;Kim, K.I.;Chung, W.J.
    • 한국진공학회지
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    • 제4권S2호
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    • pp.69-74
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    • 1995
  • The effects of TCA incorporation during annealing process on the SIMOX quality is studied. Silicon wafers are implanted with heavy dose of oxygen ions, and are annealed at $1300^{\circ}C$ for 4 hours. The annealing process is splitted into three conditions due to some differences of low temperature preliminary annealing step which are without pre-annealing step. The specimens are analyzed by several methods, such as AES, XTEM, and TRXFA. TCA incorporation during pre-annealing step is effective in dislocation density reduction and heavy metal content reduction.

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원자층 증착 기술을 이용한 TiOx 기반 TFT의 어닐링 효과 (Annealing Effect on TiOx Based Thin-Film Transistors with Atomic Layer Deposition)

  • 김한상;김성진
    • 한국전기전자재료학회논문지
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    • 제30권8호
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    • pp.474-478
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    • 2017
  • We report on thin-film transistors based on $TiO_x$ pre-annealed by femtosecond laser pulses. A 30-nm thick $TiO_x$ active channel layer was initially deposited by an ALD system. The $TiO_x$ semiconducting films were annealed by irradiation with a femtosecond laser (power: $3W/cm^2$) for 5, 25, and 50s. Atomic force microscopy images revealed that the surface of a $TiO_x$ film without femtosecond laser pre-annealing was relatively rough, while after annealing with femtosecond laser pulses, the surface of the $TiO_x$ films became smooth. With increasing radiation time, the surrounding gas atmosphere could have a larger impact on the $TiO_x$ surface; meanwhile, the thin-film roughness decreased. Thin-film transistors with $TiO_x$ active channels pre-annealed at 50s exhibited good transfer characteristics and an on-to-off current ratio of ${\sim}10^3$.

SiC 웨이퍼의 이온 주입 손상 회복을 통한 Macrostep 형성 억제 (Suppression of Macrostep Formation Using Damage Relaxation Process in Implanted SiC Wafer)

  • 송근호;김남균;방욱;김상철;서길수;김은동
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.346-349
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    • 2002
  • High Power and high dose ion implantation is essentially needed to make power MOSFET devices based on SiC wafers, because the diffusivities of the impurities such as Al, N, p, B in SiC crystal are very low. In addition, it is needed high temperature annealing for electrical activation of the implanted species. Due to the very high annealing temperature, the surface morphology after electrical activation annealing becomes very rough. We have found the different surface morphologies between implanted and unimplanted region. The unimplanted region showed smoother surface morphology It implies that the damage induced by high energy ion implantation affects the roughening mechanism. Some parts of Si-C bonding are broken in the damaged layer, s\ulcorner the surface migration and sublimation become easy. Therefore the macrostep formation will be promoted. N-type 4H-SiC wafers, which were Al ion implanted at acceleration energy ranged from 30kev to 360kev, were activated at 1600$^{\circ}C$ for 30min. The pre-activation annealing for damage relaxation was performed at 1100-1500$^{\circ}C$ for 30min. The surface morphologies of pre-activation annealed and activation annealed were characterized by atomic force microscopy(AFM).

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O2 플라즈마 전처리 및 후속 열처리 조건이 Ti 박막과 WPR 절연층 사이의 계면 접착력에 미치는 영향 (Effects of O2 Plasma Pre-treatment and Post-annealing Conditions on the Interfacial Adhesion Between Ti Thin Film and WPR Dielectric)

  • 김가희;이진아;박세훈;박영배
    • 마이크로전자및패키징학회지
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    • 제27권1호
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    • pp.37-43
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    • 2020
  • Fan-out wafer level packaging (FOWLP) 재배선 적용을 위한 Ti 박막과 WPR 절연층 사이의 계면 신뢰성을 평가하기 위해, O2 플라즈마 전처리 및 후속 열처리 시간에 따라 90° 필 테스트를 진행하였다. O2 플라즈마 전처리 시간이 증가 할수록 계면 접착력이 감소하다가 유지되는 거동을 보였으며, 이는 과도한 O2 플라즈마 전처리가 WPR 절연층 내의 C-O-C 또는 C=O 결합을 끊어 WPR 표면이 손상을 받아 계면 접착력이 저하된 것으로 판단된다. 또한 O2 플라즈마 전처리를 30초 진행한 시편을 150℃ 후속 열처리 진행한 결과, 계면 접착력이 0시간에서 24시간까지는 감소하였으나, 100시간까지 유지되는 거동을 보였다. 이는 고온에 취약한 WPR 절연층이 과도한 열처리로 인해 손상되어 계면 접착력이 급격히 감소하다가 유지되는 것으로 판단된다. 따라서, 절연층 소재에 대한 최적의 플라즈마 전처리 조건을 확보하는 것이 FOWLP 재배선의 계면신뢰성 향상을 위한 핵심요소임을 알 수 있다.

황화급속열처리를 이용한 SnS 박막성장 및 온도의존성 연구 (Study of Growth and Temperature Dependence of SnS Thin Films Using a Rapid Thermal Processing)

  • 심지현;김제하
    • 한국전기전자재료학회논문지
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    • 제29권2호
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    • pp.95-100
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    • 2016
  • We fabricated a tin sulfide (SnS) layer with Sn/Mo/glass layers followed by a RTP (rapid thermal processing), and studied the film growth and structural characteristics as a function of annealing temperature and time. The elemental sulfur (S) was cracked thermally and applied to form SnS polycrystalline film out of the Sn percursor at pre-determined pressures in the RTP tube. The sulfurization was done at the temperature from $200^{\circ}C$ to $500^{\circ}C$ for a time period of 10 to 40 min. At ${\leq}300^{\circ}C$, 20 min., p-type SnS thin films was grown and showed the best composition of at.% of [S]/[Sn] $${\sim_=}$$ 1 and [111] preferred orientation as investigated from using XRD (X-ray diffraction) analysis and EDS (energy dispersive spectroscopy) and SEM (scanning electron microscopy), and optical absorption by a UV-VIS spectrometer. In this paper, we report the details of growth characteristics of single phase SnS thin film as a function of annealing temperature and time associated with the pressure and ambient gas in the RTP tube.

Fabrication of 1 km Bi-2223/Ag PIT Tapes

  • Ha, H.S.;Lee, D.H.;Yang, J.S.;Choi, J.K.;Hwang, S.Y.;Kim, S.C.;Ha, D.W.;Oh, S.S.;Kwon, Y.K.
    • 한국초전도학회:학술대회논문집
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    • 한국초전도학회 2003년도 High Temperature Superconductivity Vol.XIII
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    • pp.87-87
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    • 2003
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