• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.3
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• pp.264-268
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• 2005

A 2.2-inch QCIF+(176${\times}$RGB${\times}$220) TFT-LCD with integrated row driver was developed using a standard amorphous silicon TFT technology. At low temperature, the integrated row driver operation is dramatically effected by the electron drift mobility reduction(■50 %) and the threshold voltage shift (■1V) of the a-Si TFT. We studied the dependency of circuit design and found that higher on-current circuit is important to guarantee good operation in wide temperature range.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.559-562
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• 2004

A 2.2-inch QCIF+ $(176{\times}RGB{\times}220)$ TFT-LCD with integrated row driver was developed using a standard amorphous silicon TFT technology. At low temperature $({\sim}-20^{\circ}C)$, the integrated row driver operation is dramatically effected by the electron drift mobility variation $({\sim}50%)$ and the threshold voltage shift $({\sim}1V)$ of the a-Si TFT. We studied the temperature dependency of the circuit design and found that higher on-current circuit is important to guarantee good operation in wide temperature range.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.3
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• pp.39-46
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• 1994

CMOS LCD driving circuits using poly-Si TFT have been designed and basic blocks including test patterns have been fabricated. Column driver drives the pixels by block because polu-Si TFT can not operate at the speed of video signal. Row driver has mode selection circuit which can select a mode between interlacing mode and non-interlacing mode. Experimental results show shift register can operate at 1MHz colck frequency with 4pF load.

• ETRI Journal
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• v.25 no.5
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• pp.288-296
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• 2003

In this study, we present a 260k color TFT LCD driver chip set that consumes only 5 mW in the module, which has exceptionally low power consumption. To reduce power consumption, we used many power-lowering schemes in the logic and analog design. A driver IC for LCDs has a built-in graphic SRAM. Besides write and read operations, the graphic SRAM has a scan operation that is similar to the read operation of one row-line, which is displayed on one line in an LCD panel. Currently, the embedded graphic memory is implemented by an 8-transistor leaf cell and a 6-transistor leaf cell. We propose an efficient scan method for a 6-transistor embedded graphic memory that is greatly improved over previous methods. The proposed method is implemented in a 0.22 ${\mu}m$ process. We demonstrate the efficacy of the proposed method by measuring and comparing the current consumption of chips with and without our proposed scheme.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.589-590
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• 2008

This paper describes an improved design of graphic memory for QVGA ($320{\times}240\;RGB$) - scale 262k-color LCD Driver IC. A distributor block is adopted to reduce graphic RAM area, which is accomplished with 1/8 data lines of the previous structure. In line-read operation, the drivabilty of memory array cell is improved by partitioning a word line according to the row address. The proposed graphic memory circuit has been designed in transistor level using $0.18{\mu}m$ CMOS technology library and verified using Hsim.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.882-886
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• 2005

As the TFT-LCD panels become larger and provide higher resolution, the distributed capacitive and resistive lines induce the propagation delay, reduce the TFT-on time and deteriorate the pixel chargingratio. A number of the compensation methods, like the H-LDC (Horizontal Line Delay Compensation), have been proposed to compensate the propagation delay of the large and high resolution panels [1]. These methods, however, require the comparatively accurate gate propagation delay estimates at each column driver. In this paper, by observing the actual gate and data waveform from 15-inch XGA TFT-LCD panels, we could predict the propagation delay along the row and column line.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.12
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• pp.1667-1670
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• 2014

This paper describes a method for detecting the pupil region and identification of the eye status for driver drowsiness detection system. This program detects a driver's face and eyes using viola-jones face detection algorithm and extracts the pupil area by utilizing mean values of each row and column on the eye area. The proposed method uses binary images and the number of black pixels to identify the eye status. Experimental results showed that the accuracy of classification eye status(open/close) was above 90%.

• Journal of Korean Vacuum Science & Technology
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• v.3 no.1
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• pp.66-73
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• 1999

In this paper, the design of one-chip FED system integrated with driving circuits in reported on the basis of MOSFET controlled FEA (MCFEA). To integrate a MOSFET with a FEA efficiently, a new fabrication process is proposed. It is confirmed that the MOSFET with threshold voltage of about 2volts controls the FEA emission current up to 20 ${\mu}$A by applying driving voltage of 15 volts, which is enough current level to utilize the MCFEA as a pixel for FED. The drain breakdown voltage of the MOSFET is measured to be 70 volts, which is also high enough for 60 volt operation of FED. The circuits for row and column driver are designed stressing on saving area, reducing malfunction probability and consuming low power to maximize the merit of on-chip driving circuits. Dynamic logic concept and bootstrap capacitors are used to meet these requirements. By integrating the driving circuit with FEA, the number of external I/O lines can be less than 20, irrespectively of the number of pixels.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.1001-1004
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• 2007

This paper proposes a novel RGB-LED (light emitting diode) backlight system, for 32" LCD TVs, accompanied by a new X-Y Channel driving method in which its row and column switches control the individual division screen. This proposed driving method is able to produce division driving effects such as image improvement and reduced power consumption. Not only that, the number of driver needed in this method, that is 3 power supplies with 3*(m+n) switches, is much fewer than that of cluster driving method, that is 3*(m*n) driver.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.10a
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• pp.212-215
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• 2005

The needs of larger screen in mobile device would be increased as the time of ubiquitous and convergence is coming. And, the type of mobile device has been evolved from bar, slide to row. Recently, the study on the multi-display screen which has seamless gap between two display panel has been published, and moreover the System On Chip(SOC) design strategy of core chip has been the most promising Field-Programmable Gate Array(FPGA) technology in the display system. Therefore, in this paper, we proposed the design technique of SOC and evaluated the effectiveness with Very high speed Hardware Description Language(VHDL) Intellectual Property (IP) for the operation of multi display device driver. Also, This IP design would be to allow any kind of user interface in control system.