• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.11
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• pp.41-47
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• 2011

A novel digital instrumentation amplifier(DIA) converting universal signal inputs into 5V voltage-output for industry standard sensor signal processing was designed. The circuit consists of a commercial instrumentation amplifier, seven analog switches, two voltage references of 1.0V and -10.0V, and four resistors. The converting principle is the circuit reconstruction by switches for resistor values and reference voltages according to input signals. The simulation result shows that the DIA has a good output voltage characteristics of 0~5V for the input voltage of 0V~5V, 1V~5V, -10V~+10V, and 4mA~20mA. The nonlinearity error was less than 0.1% for the four type signal inputs.

• Transactions of the Korean Society of Automotive Engineers
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• v.15 no.6
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• pp.94-101
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• 2007

This paper, we analyzed that the measured data of the radiated power spectrum of electromagnetic waves and the standing wave ratio(SWR) of the spark plug cable and spark plug. The measured data are the power strength of the electromagnetic waves radiated from the spark ignition system, the measured frequency ranges are 110 to 610MHz. The results show that the strength of radiated power spectrum and bandwidth have relation to the SWR of the the spark plug cable and spark plug, and the SWR of them is different because of the characteristics of resistor at the spark plug is different with the manufacturers. From the analyzed results, it can be concluded that the less SWR is little, the less maximum level of power spectrum is weak and bandwidth above the reference level is small.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.4
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• pp.309-315
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• 2010

A fully-differential low-voltage low-power electrocardiogram (ECG) amplifier by using the nonfeedback PMOS pseudo-resistors is proposed. It consists of two operational-transconductance amplifiers (OTA) in series (a preamplifier and a variable-gain amplifier). To make it insensitive to the gate leakage current of the OTA input transistor, the feedback pseudo-resistor of the conventional ECG amplifier is moved to input branch between the OP amp summing node and the DC reference voltage. Also, an OTA circuit with a Gm boosting block without reducing the output resistance (Ro) is proposed to maximize the OTA DC gain. The measurements shows the frequency bandwidth from 7 Hz to 480 Hz, the midband gain programmable from 48.7 dB to 59.5 dB, the total harmonic distortion (THD) less than 1.21% with a full voltage swing, and the power consumption of 233 nW in a 0.13 ${\mu}m$ CMOS process at the supply voltage of 0.7 V.

• The Journal of the Korea institute of electronic communication sciences
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• v.6 no.4
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• pp.545-552
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• 2011

In this article, reference voltages in a general flash ADC are not obtained from a series of resistors but floating gates. When a behavior model simulation was performed in a pipelined ADC including the suggested flash ADC as a result of an ADC's overall function, it showed results that SNR is approximately 77 dB and resolution is 12 bit. And more than almost 90% showed INL within ${\pm}0.5$ LSB, and like INL, more than 90% showed DNL within ${\pm}0.5$ LSB.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.767-769
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• 1998

Using the R/V converting circuit, hydrogen detecting characteristics of the $WO_3$ films were investigated. The R/V converting circuit is configured with the equivalently constant current driving method connecting an unknown resistor to be measured in the feedback loop of the or-amr rather than using a separated constant current circuit. The response time of the reference voltage for the R/V converting circuit was simulated by the circuit simulator "SABER", and it was found that the response time in the high resistance range become longer and the error amounts to 10%. From the simulation results. replacing the capacitor in the feedback loop of the second stage or-amp with a 0.001uF capacitor, when measuring in the high resistance range, the response characteristics are remarkably improved. The response time was shortened from about 10 seconds to below 1 second. Using this circuit, the effect of $WO_3$ films deposited by sputtering method on hydrogen was measured.

• Proceedings of the KIEE Conference
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• 2002.07d
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• pp.2577-2579
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• 2002

In this paper, we describe a CMOS DC-DC converter with a variable output voltage(8-12V @100mA) for a portable battery-operated system applications. The proposed DC-DC converter is used along with a Pulse-Frequency Modulation (PFM) method and consists of a reference circuit, a feedback resistor, a controller, and an internal oscillator. The integrated DC-DC converter with two external passive components(L.C) has been designed and fabricated on a 0.6${\mu}m$ 2-poly, 3-metal CMOS process and could be applied to the Personal Digital Assistants(PDA), Cellular Phone, Laptop Computer, etc.

• 전자공학회논문지 IE
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• v.47 no.3
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• pp.14-18
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• 2010

In this paper, we describe a CMOS DC-DC converter with a variable output voltage(5-7V @100mA) for a portable battery-operated system applications. The proposed DC-DC converter is used along with a Pulse-Frequency Modulation (PFM) method and consists of reference circuit, a feedback resistor, a controller, and an internal oscillator. The integrated DC-DC converter with two external passive components(L,C) has been designed and fabricated on a 0.5um 2-poly 3-metal CMOS process and could be applied to the Personal Digital Assistants(PDA), cellular Phone, Laptop Computer, etc.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.8
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• pp.67-74
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• 2004

In this paper, a 3.3V 8-bit 500MSPS based on an interpolation architecture CMOS A/D converter is designed. In order to overcome the problems of high speed operation, a novel pre-amplifier, a circuit for the Reference Fluctuation, and an Averaging Resistor are proposed. The proposed Interpolation A/D Converter consists of Track ＆ Hold, four resistive ladders with 256 taps, 128 comparators, and digital blocks. The proposed A/D Converter is based on 0.35um 2-poly 4-metal N-well CMOS technology. The A/D Converter dissipates 440 mW at a 3.3 Volt single power supply and occupies a chip area of 2250um x 3080um.

• Journal of Power Electronics
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• v.10 no.4
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• pp.419-427
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• 2010

A parallel control strategy in capacity proportion frequency allocation mode for shunt active power filters (APFs) is proposed to overcome some of the difficulties in high power applications. To improve the compensation accuracy and overall system stability, an improved selective harmonic current control based on multiple synchronous rotating reference coordinates is presented in a single APF unit, which approximately implements zero steady-state error compensation. The combined decoupling strategy is proposed and theoretically analyzed to simplify selective harmonic current control. Improved selective harmonic current control forms the basis for multi-APF parallel operation. Therefore, a parallel control strategy is proposed to realize a proper optimization so that the APFs with a larger capacity compensate more harmonic current and the ones with a smaller capacity compensate less harmonic current, which is very practical for accurate harmonic current compensation and stable grid operation in high power applications. This is verified by experimental results. The total harmonic distortion (THD) is reduced from 29% to 2.7% for a typical uncontrolled rectifier load with a resistor and an inductor in a laboratory platform.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.6 s.360
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• pp.8-18
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• 2007

In this paper, a 4bit cell way structure of PoRAM and the sensing method to drive this structure are researched. PoRAM has a different operation from existing SRAM and DRAM. The operation is that when certain voltage is applied between top electrode and bottom electrode of PoRAM device we can classify the cell state by measuring cell current which is made by changing resistance of the cell. In the decoder selected by new-addressing method in the cell array, the row decoder is selected "High" and the column decoder is selected "Low" then certain current will flow to the bit-line. Because this current is detect, in order to make large enough current, the voltage sense amplifier is used. In this case, usually, 1-stage differential amplifier using current mirror is used. Furthermore, the detected value at the cell is current, so a diode connected NMOSFET, that is, a device resistor is used at the input port of the differential amplifier to converter current into voltage. Using this differential amplifier, we can classify the cell states, erase mode is "Low" and write mode is "High", by comparing the input value, Vin, that is a product of current value multiplied by resistor value with a reference voltage, Vref.