• Title/Summary/Keyword: Receiver gain

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A study on the design of LNA for Ku-band LNB module (Ku-band에서의 LNB 모듈을 위한 LNA 설계에 관한 연구)

  • Kwak, Yong-Soo;Chung, Tae-Kyung;Kim, Hyeong-Seok
    • Proceedings of the KIEE Conference
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    • 2004.07c
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    • pp.2034-2036
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    • 2004
  • In this paper, a low noise amplifier (LNA) in receiver of Low Noise Block Down Converter (LNB) for direct broadcasting service (DBS) is implemented by using GaAs HEMT. The LNA is designed for operation between 10.7GHz-12.7GHz. The LNA consists of input, output matching circuits, DC-blocks and RF-chokes. Simulation result of the LNA shows that a noise figure is less than 1.4dB and a gain is greater than 9.2dB in the bandwidth of 10.7 to 12.7GHz with good flatness of 0.1dB.

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CMOS Low Noise Amplifier Design for IMT-2000 (IMT-2000용 CMOS 저잡음증폭기 설계)

  • 김신철;이상국
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.333-336
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    • 2000
  • This paper describes a CMOS low noise amplifier (LNA) with bias current reusing architecture intended lot use in the front-end of IMT-2000 receiver. It has been implemented in a 0.35$\mu\textrm{m}$ CMOS process with two poly and four metal layers. In order to accuracy of simulation, we considered a bonding wire and a pad effect and used the measurements of capacitors and on-chip inductors which implemented in the same process. The LNA has a forward gain (S21) of 17 ㏈ and a noise fjgure of 1.26 ㏈. And it has a third-order intermodulation intercept point (IP3) of +3.15 ㏈m and a 1㏈ compression point (P1㏈) of -16 ㏈m, input referred, respectively. The power consumption is 19 ㎽ from a 3V supply.

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A High Data Rate, High Output Power 60 GHz OOK Modulator in 90 nm CMOS

  • Byeon, Chul Woo;Park, Chul Soon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.3
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    • pp.341-346
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    • 2017
  • In this paper, we present a 60 GHz on-off keying (OOK) modulator in a 90 nm CMOS. The modulator employs a current-reuse technique and a switching modulation for low DC power dissipation, high on/off isolation, and high data rate. The measured gain of the modulator, on/off isolation, and output 1-dB compression point is 9.1 dB, 24.3 dB, and 5.1 dBm, respectively, at 60 GHz. The modulator consumes power consumption of 18 mW, and is capable of handling data rates of 8 Gb/s at bit error rate of less than $10^{-6}$ for $231^{-1}$ PRBS over a distance of 10-cm with an OOK receiver module.

performance Evaluation of a Multi-Media DS/SSMA System (다매체 직접수열 대역확산 다중접속 시스템의 성능분석)

  • 김홍직;송익호;김상우;한진희
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 1996.06a
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    • pp.33-38
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    • 1996
  • A multi-media binary DS/CDMA system with variable processing gain and coherent correlation receivers are considered under additive white Gaussian noise channels. Two types of information sources with different rates and transmitting powers are assumed to be transmitted simultaneously in the same channel. Average signal-to-noise ratios at the correlation receiver outputs for each type of information sources are analytically derived as functions of discrete partial cross-correlations between spreading code sequences. The analysis is expected to provide analytical tools for use in preliminary system design and spreading code selection.

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CMOS Direct-Conversion RF Front-End Design for 5-GHz WLAN

  • Oh, Nam-Jin
    • Journal of electromagnetic engineering and science
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    • v.8 no.3
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    • pp.114-118
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    • 2008
  • Direct-conversion RF front-end for 5-GHz WLAN is implemented in $0.18-{\mu}m$ CMOS technology. The front-end consists of a low noise amplifier, and low flicker noise down-conversion mixers. For the mixer, an inductor is included to resonate out parasitic tail capacitances in the transconductance stage at the operating frequency, thereby improves the flicker noise performance of the mixer, and the overall noise performance of the front-end. The receiver RF front-end has 6.5 dB noise figure, - 13 dBm input IP3, and voltage conversion gain of 20 dB with the power consumption of 30 mW.

Dual-Polarized Annular Ring Patch Antenna for 2.4 GHz Doppler Radar

  • Kim, Seong-Ho;Yook, Jong-Gwan;Cho, Sung-Ho;Jang, Byung-Jun
    • Journal of electromagnetic engineering and science
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    • v.10 no.3
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    • pp.183-185
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    • 2010
  • A 2.4 GHz dual-polarized antenna for a Doppler radar is studied. The proposed dual-polarized antenna using a stacked annular ring patch with two co-centric gap-coupled feed lines and a $90^{\circ}$ hybrid exhibits fairly good performance of 22 dB isolation at a center frequency of 2.4 GHz. Using a $90^{\circ}$ hybrid, a right-handed circular polarization for the transmitter and a left-handed circular polarization for the receiver are implemented. The gain of the designed antenna is about 0 dBi over operating frequencies. The antenna size including a ground plane is only $40{\times}40\;mm^2$.

Multiple Eavesdropper-Based Physical Layer Security in SIMO System With Antenna Correlation

  • Sun, Gangcan;Liu, Mengge;Han, Zhuo;Zhao, Chuanyong
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.14 no.1
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    • pp.422-436
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    • 2020
  • In this paper, we investigate the impact of antenna correlation on secure transmission in a multi-eavesdropper single-input multiple-output (SIMO) system, where the receiver and eavesdroppers are equipped with correlated antennas. Based on the practical passive eavesdropping system, the new closed-form expressions of secrecy outage probability (SOP) and non-zero secrecy capacity probability are derived to explore the effect of antenna correlation on the system with multiple eavesdroppers. To further analyze the secrecy performance of the investigated system, we theoretically derive the expression of asymptotic SOP to clearly show the diversity order and array gain. Finally, Monte Carlo simulations verify the effectiveness of our theoretical results.

Effect of Synchronization Errors on the Performance of Multicarrier CDMA Systems

  • Li Ying;Gui Xiang
    • Journal of Communications and Networks
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    • v.8 no.1
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    • pp.38-48
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    • 2006
  • A synchronous multicarrier (MC) code-division multiple access (CDMA) system using inverse fast Fourier transform (IFFT) and fast Fourier transform (FFT) for the downlink mobile communication system operating in a frequency selective Rayleigh fading channel is analyzed. Both carrier frequency offset and timing offset are considered in the analysis. Bit error rate performance of the system with both equal gain combining and maximum ratio combining are obtained. The performance is compared to that of the conventional system using correlation receiver. It is shown that when subcarrier number is large, the system using IFFT/FFT has nearly the same performance as the conventional one, while when the sub carrier number is small, the system using IFFT/FFT will suffer slightly worse performance in the presence of carrier frequency offset.

Determination of Channel Capacity Bounds of Narrow Band ISDN Subscriber Line in the Presence of Impulsive Noise (임펼스성 잡음이 있을때 협대역 ISDN 가입자 전송로의 통신로 용량 한계 결정)

  • Lee, Jong-Heon;Sung, Tae-Kyung;Chin, Yong-Ohk
    • Proceedings of the KIEE Conference
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    • 1987.07b
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    • pp.854-858
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    • 1987
  • This paper considers impulsive noise which produce burst error in high speed(approx.160Kbps) data transmission like ISDN(Integrated Servise Digital Network) using PSTN(Public Switching Telephone Network). To begin with, we obtains the transfer function of subscriber line to calculate the variation of bandwidth when the gain of receiver is fixed and channel capacity of non-gaussian channel in upper-and lower bound, and evaluates the transmission capability. In this paper compares channel capacity bounds which obtains when probability density function of impulsive noise is Laplacian distribution function with impulsive noise generated by waveform synthesier.

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Design and fabrication of GaAs MMIC VCO/Mixer for PCS applications (PCS영 GaAs VCO/Mixer MMIC 설계 및 제작에 관한 연구)

  • 강현일;오재응;류기현;서광석
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.5
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    • pp.1-10
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    • 1998
  • A GaAs MMIC composed of VCO (voltage controlled oscillator) and mixer for PCS receiver has been developed using 1.mu.m ion implanted GaAs MESFET process. The VCO consists of a colpitts-type oscillator with a dielectric resonator and the circuit configuration of the mixer is a dual-gate type with an asymmetric combination of LO and RF FETs for the improvement of intermodulation characteristics. The common-source self-biasing is used in all circuits including a buffer amplifier and mixer, achieving a single power supply (3V) operation. The total power dissipation is 78mW. The VCO chip shows a phase noise of-99 dBc/Hz at 100KHz offset. The combined VCO/mixer chip shows a flat conversion gain of 2dB, the frequency-tuning factor of 80MHz/volts in the varacter bias ranging from 0.5V to 0.5V , and output IP3 of dBm at varactor bias of 0V. The fabricated chip size is 2.5mm X 1.4mm.

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