• Title/Summary/Keyword: Rapid thermal process

Search Result 452, Processing Time 0.031 seconds

Preparation and electrical properties of thick PZT films deposited on alumina substrates with Ag-Pd electrodes and Pt plates by spin-on process (Ag-Pd/알루미나 및 Pt전극에 스핀온 방법으로 제조된 PZT후막의 전기적 특성)

  • Cho, Hyun-Choon;Yoo, Kwang-Soo;Baik, Hion-Suck;M. Troccaz;D. Barbier
    • Journal of the Korean Crystal Growth and Crystal Technology
    • /
    • v.7 no.2
    • /
    • pp.309-314
    • /
    • 1997
  • The electrical properties of thick PZT films deposited on Ag-Pd/$Al_2O_3$ and Pt electrodes were carefully investigated according to the annealing methods and the sub-strates. For electrical properties measurements, silver was deposited on PZT films as top electrode. The crystallogaphic structure of the films was examined by standard X-ray diffraction method to determine which crystalline phase was present. Dielctric constant was measured at 1 kHz, 10 mV by using a HP4284A. The electrical properties of PZT films with 3 wt% PbO addition were not improved. It was also found that the Ag-Pd layer has a good possibility as electrode instead of Pt. It seems clear from the present experiments that the thick PZT films having the good electrical properties can certainly be obtained using spin on technique combined with rapid thermal annealing.

  • PDF

Growth of Non-Polar a-plane ZnO Layer On R-plane (1-102) Sapphire Substrate by Hydrothermal Synthesis (저온 수열 합성법에 의해 (1-102) 사파이어 기판상에 성장된 무분극 ZnO Layer 에 관한 연구)

  • Jang, Jooil;Oh, Tae-Seong;Ha, Jun-Seok
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.21 no.4
    • /
    • pp.45-49
    • /
    • 2014
  • In this study, we grew non-polar ZnO nanostructure on (1-102) R-plane sapphire substrates. As for growth method of ZnO, we used hydrothermal synthesis which is known to have the advantages of low cost and easy process. For growth of non-polar, the deposited AZO seed buffer layer with of 80 nm on R-plane sapphire by radio frequency magnetron sputter was annealed by RTA(rapid thermal annealing) in the argon atmosphere. After that, we grew ZnO nanostructure on AZO seed layer by the added hexamethylenetramine (HMT) solution and sodium citrate at $90^{\circ}C$. With two types of additives into solution, we investigated the structures and shapes of ZnO nanorods. Also, we investigate the possibility of formation of 2D non-polar ZnO layer by changing the ratio of two additives. As a result, we could get the non-polar A-plane ZnO layer with well optimized additives' concentrations.

Metal Gate Electrode in SiC MOSFET (SiC MOSFET 소자에서 금속 게이트 전극의 이용)

  • Bahng, W.;Song, G.H.;Kim, N.K.;Kim, S.C.;Seo, K.S.;Kim, H.W.;Kim, E.D.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2002.07a
    • /
    • pp.358-361
    • /
    • 2002
  • Self-aligned MOSFETS using a polysilicon gate are widely fabricated in silicon technology. The polysilicon layer acts as a mask for the source and drain implants and does as gate electrode in the final product. However, the usage of polysilicon gate as a self-aligned mask is restricted in fabricating SiC MOSFETS since the following processes such as dopant activation, ohmic contacts are done at the very high temperature to attack the stability of the polysilicon layer. A metal instead of polysilicon can be used as a gate material and even can be used for ohmic contact to source region of SiC MOSFETS, which may reduce the number of the fabrication processes. Co-formation process of metal-source/drain ohmic contact and gate has been examined in the 4H-SiC based vertical power MOSFET At low bias region (<20V), increment of leakage current after RTA was detected. However, the amount of leakage current increment was less than a few tens of ph. The interface trap densities calculated from high-low frequency C-V curves do not show any difference between w/ RTA and w/o RTA. From the C-V characteristic curves, equivalent oxide thickness was calculated. The calculated thickness was 55 and 62nm for w/o RTA and w/ RTA, respectively. During the annealing, oxidation and silicidation of Ni can be occurred. Even though refractory nature of Ni, 950$^{\circ}C$ is high enough to oxidize it. Ni reacts with silicon and oxygen from SiO$_2$ 1ayer and form Ni-silicide and Ni-oxide, respectively. These extra layers result in the change of capacitance of whole oxide layer and the leakage current

  • PDF

Fabrication of SiC Schottky Diode with Field oxide structure (Field Oxide를 이용한 고전압 SiC 쇼트키 diode 제작)

  • Song, G.H.;Bahng, W.;Kim, S.C.;Seo, K.S.;Kim, N.K.;Kim, E.D.;Park, H.S.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2002.07a
    • /
    • pp.350-353
    • /
    • 2002
  • High voltage SiC Schottky barrier diodes with field plate structure have been fabricated and characterized. N-type 4H-SiC wafer with an epilayer of ∼10$\^$15/㎤ doping level was used as a starting material. Various Schottky metals such as Ni, Pt, Ta, Ti were sputtered and thermally-evaporated on the low-doped epilayer. Ohmic contact was formed at the backside of the SiC wafer by annealing at 950$^{\circ}C$ for 90 sec in argon using rapid thermal annealer. Field oxide of 550${\AA}$ in thickness was formed by a wet oxidation process at l150$^{\circ}C$ for 3h and subsequently heat-treated at l150$^{\circ}C$ for 30 min in argon for improving oxide quality. The turn-on voltages of the Ni/4H-SiC Schottky diode was 1.6V which was much higher than those of Pt(1.0V), Ta(0.7V) and Ti(0.7). The voltage drop was measured at the current density of 100A/$\textrm{cm}^2$ showing 2.1V for Ni Schottky diode, 1.45V for Pt 1.35V, for Ta, and 1.25V for Ti, respectively. The maximum reverse breakdown voltage was measured 1100V in the file plated Schottky diodes with 101an thick epilayer.

  • PDF

A Study on Improvement and Degradation of Si/SiO2 Interface Property for Gate Oxide with TiN Metal Gate

  • Lee, Byung-Hyun;Kim, Yong-Il;Kim, Bong-Soo;Woo, Dong-Soo;Park, Yong-Jik;Park, Dong-Gun;Lee, Si-Hyung;Rho, Yong-Han
    • Transactions on Electrical and Electronic Materials
    • /
    • v.9 no.1
    • /
    • pp.6-11
    • /
    • 2008
  • In this study, we investigated effects of hydrogen annealing (HA) and plasma nitridation (PN) applied in order to improve $Si/SiO_2$ interface characteristics of TiN metal gate. In result, HA and PN showed a positive effect decreasing number of interface state $(N_{it})$ respectively. After FN stress for verifying reliability, however, we identified rapid increase of $N_{it}$ for TiN gate with HA, which is attributed to hydrogen related to a change of $Si/SiO_2$ interface characteristic. In contrast to HA, PN showed an improved Nit and gate oxide leakage characteristic due to several possible effects, such as blocking of Chlorine (Cl) diffusion and prevention of thermal reaction between TiN and $SiO_2$.

Formation of Ohmic Contacts on acceptor ion implanted 4H-SiC (이온 이온주입한 p-type 4H-SiC에의 오믹 접촉 형성)

  • Bahng, W.;Song, G.H.;Kim, H.W.;Seo, K.S.;Kim, S.C.;Kim, N.K.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2003.07a
    • /
    • pp.290-293
    • /
    • 2003
  • Ohmic contact characteristics of Al ion implanted n-type SiC wafer were investigated. Al ions implanted with high dose to obtain the final concentration of $5{\times}10^{19}/cm^3$, then annealed at high temperature. Firstly, B ion ion implanted p-well region were formed which is needed for fabrication of SiC devices such as DIMOSFET and un diode. Secondly, Al implanted high dose region for ohmic contact were formed. After ion implantation, the samples were annealed at high temperature up to $1600^{\circ}C\;and\;1700^{\circ}C$ for 30 min in order to activate the implanted ions electrically. Both the inear TLM and circular TLM method were used for characterization. Ni/Ti metal layer was used for contact metal which is widely used in fabrication of ohmic contacts for n-type SiC. The metal layer was deposited by using RF sputtering and rapid thermal annealed at $950^{\circ}C$ for 90sec. Good ohmic contact characteristics could be obtained regardless of measuring methods. The measured specific contact resistivity for the samples annealed at $1600^{\circ}C\;and\;1700^{\circ}C$ were $1.8{\times}10^{-3}{\Omega}cm^2$, $5.6{\times}10^{-5}{\Omega}cm^2$, respectively. Using the same metal and same process of the ohmic contacts in n-type SiC, it is found possible to make a good ohmic contacts to p-type SiC. It is very helpful for fabricating a integrated SiC devices. In addition, we obtained that the ratio of the electrically activated ions to the implanted Al ions were 10% and 60% for the samples annealed at $1600^{\circ}C\;and\;1700^{\circ}C$, respectively.

  • PDF

Spinning Multi Walled Carbon Nanotubes and Flexible Transparent Sheet Film

  • Jang, Hun-Sik;Lee, Seok-Cheol;Kim, Ho-Jong;Jeong, In-Hyeon;Park, Jong-Seo;Nam, Seung-Hun
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2012.02a
    • /
    • pp.200-200
    • /
    • 2012
  • We investigated a flexible transparent film using the spinning multi-walled carbon nanotubes (MWCNTs). Spin-capable MWCNTs on iron catalyzed on a SiO2 wafer was grown by chemical vapor deposition, which was performed at $780^{\circ}C$ using C2H2 and H2 gas. The average diameter and length of MWCNTs grown on the substrate were ~15 nm and $250{\sim}300{\mu}m$, respectively. The MWCNT sheets were produced by continuously pulling out from well-aligned MWCNTs on a substrate. The MWCNT sheet films were produced simply by direct coating on the flexible film or grass. The thickness of sheet film was remarkably decreased by alcohol spraying on the surface of sheet. The alcohol splay increased transmittance and decreased electrical resistance of MWCNT sheet films. Single and double sheets were produced with sheet resistance of ~699 and ${\sim}349{\Omega}/sq$, respectively, transmittance of 81~85 % and 67~72%, respectively. The MWCNT sheet films were heated through the application of direct current power. The flexible transparent heaters showed a rapid thermal response and uniform distribution of temperature. In addition, MWCNT yarns were prepared by spinning a bundle of MWCNTs from vertically super-aligned MWCNTs on a substrate, and field emission from the tip and side of the yarns was induced in a scanning electron microscope. We found that the field emission behavior from the tip of the yarn was better than the field emission from the side. The field emission turn-on voltages from the tip and side of MWCNT yarns were 1.6 and $1.7V/{\mu}m$, respectively, after the yarn was subjected to an aging process. Both the configuration of the tip end and the body of the yarn were changed remarkably during the field emission. We also performed the field emission of the sheet films. The sheet films showed the turn on voltage of ${\sim}1.45V/{\mu}m$ during the field emission.

  • PDF

Effects of Se/(S+Se) Ratio on Cu2ZnSn(SxSe1-x)4 (CZTSSe) Thin Film Solar Cells Fabricated by Sputtering

  • Park, Ju Young;Hong, Chang Woo;Moon, Jong Ha;Gwak, Ji Hye;Kim, Jin Hyeok
    • Current Photovoltaic Research
    • /
    • v.3 no.3
    • /
    • pp.75-79
    • /
    • 2015
  • Recently, $Cu_2ZnSn(S_xSe_{1-x})_4$ (CZTSSe) has been received a tremendous attraction as light absorber material in thin film solar cells (TFSCs), because of its earth abundance, inexpensive and non-toxic constituents and versatile material characteristics. Kesterite CZTSSe thin films were synthesized by sulfo-selenization of sputtered Cu/Sn/Zn stacked metallic precursors. The sulfo-selenization of Cu/Sn/Zn stacked metallic precursor thin films has been carried out in a graphite box using rapid thermal annealing (RTA) technique. Annealing process was done under sulfur and selenium vapor pressure using Ar gas at $520^{\circ}C$ for 10 min. The effect of tuning Se/(S+Se) precursor composition ratio on the properties of CZTSSe films has been investigated. The XRD, Raman, FE-SEM and XRF results indicate that the properties of sulfo-selenized CZTSSe thin films strongly depends on the Se/(S+Se) composition ratio. In particular, the CZTSSe TFSCs with Se/(S+Se) = 0.37 exhibits the best power conversion efficiency of 4.83% with $V_{oc}$ of 467 mV, $J_{sc}$ of $18.962mA/cm^2$ and FF of 54%. The systematic changes observed with increasing Se/(S+Se) ratio have been discussed in detail.

Study of Effect of PZT Thin Film Prepared in Different Post-Annealing Temperature Using SIMS (이차이온질량분석기를 이용한 PZT 박막의 후열처리 온도에 따른 특성에 관한 연구)

  • Shenteng, Shenteng;Lee, Tae-Yong;Lee, Kyung-Chun;Hur, Won-Young;Shin, Hyun-Chang;Kim, Hyun-Duk;Song, Joon-Tae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.24 no.5
    • /
    • pp.392-397
    • /
    • 2011
  • The effect of various post-annealing temperature to sputtered Pb(Zr,Ti)$O_3$ (PZT) thin films was investigated. The crystallization process, surface morphology and the electrical characteristics strongly depends on the rapid thermal annealing (RTA). In radio frequency (RF) sputtering methods, there were many papers mostly forcing on the crystal forming and the surface variations with different elements distribution (Pb, Ti, Zr, O) on the surface of the PZT layer. In this experiment, the post-annealing treatment promoted the Pb volatilization in PZT thin film and affected the Ti diffused throughout the Pt layer into the PZT layer. Second ion mass spectroscopy (SIMS) analysis was employed to show that the Pb element in the PZT layer was decreased at the same time the Ti element mass was slight decreased than Pb with increasing RTA temperature. That result prove the content of Pb affect the PZT thin film property.

Characteristics of Ni/Co Composite Silicides for Poly-silicon Gates (게이트를 상정한 니켈 코발트 복합실리사이드 박막의 물성연구)

  • Kim, Sang-Yeob;Jung, Young-Soon;Song, Oh-Sung
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.12 no.2 s.35
    • /
    • pp.149-154
    • /
    • 2005
  • We fabricated Ni/Co(or Co/Ni) composite silicide layers on the non-patterned wafers from Ni(20 nm)/Co(20 nm)/poly-Si(70 nm) structure by rapid thermal annealing of $700{\~}1100^{\circ}C$ for 40 seconds. The sheet resistance, cross-sectional microstructure, and surface roughness were investigated by a four point probe, a field emission scanning electron microscope, and a scanning probe microscope, respectively. The sheet resistance increased abruptly while thickness decreased as silicidation temperature increased. We propose that the poly silicon inversion due to fast metal diffusion lead to decrease silicide thickness. Our results imply that we should consider the serious inversion and fast transformation in designing and process f3r the nano-height fully cobalt nickel composite silicide gates.

  • PDF