• Journal of the Korean Ceramic Society
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• v.38 no.10
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• pp.871-875
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• 2001

Cobalt silicidation at sidewall spacer edge of Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) with post annealing treatment for capacitor forming process has been investigated as a function of dopant species. Cobalt silicidation of nMOSFET with n-type Lightly Doped Drain (LDD) and pMOSFET with p-type LDD produces a well-developed cobalt silicide with its lateral growth underneath the sidewall spacer. In case of pMOSFET with n-type LDD, however, a void is formed at the sidewall spacer edge with no lateral growth of cobalt silicide. The void formation seems to be due to a retarded silicidation process at the LDD region during the first Rapid Thermal Annealing (RTA) for the reaction of Co with Si, resulting in cobalt mono silicide at the LDD region. The subsequent second RTA converts the cobalt monosilicide into cobalt disilicide with the consumption of Si atoms from the Si substrate, producing the void at the sidewall spacer edge in the Si region. The void formed at the sidewall spacer edge serves as a resistance in the current-voltage characteristics of the pMOSFET device.

• 한국신재생에너지학회:학술대회논문집
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• 2006.06a
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• pp.222-224
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• 2006

A non-vacuum process for $Cu(In,Ga)Se_2$ (CIGS) thin film solar cells from nanoparticle precursors was described in this work CIGS nanoparticle precursors was prepared by a low temperature colloidal route by reacting the starting materials $(CuI,\;InI_3,\;GaI_3\;and\;Na_2Se)$ in organic solvents, by which fine CIGS nanoparticles of about 20nm in diameter were obtained. The nanoparticle precursors were mixed with organic binder material for the rheology of the mixture to be adjusted for the doctor blade method. After depositing the mixture of CIGS with binder on Mo/glass substrate, the samples were preheated on the hot plate in air to evaporate remaining solvents ud to burn the organic binder material. Subsequently, the resultant (porous) CIGS/Mo/glass simple was selenized in a two-zone Rapid Thermal Process (RTP) furnace in order to get a solar ceil applicable dense CIGS absorber layer. Complete solar cell structure was obtained by depositing. The other layers including CdS buffer layer, ZnO window layer and Al electrodes by conventional methods. The resultant solar cell showed a conversion efficiency of 0.5%.

• Journal of the Korean institute of surface engineering
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• v.32 no.3
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• pp.389-392
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• 1999

We employed cobalt-disilicide for high-speed logic devices. We prepared stable and low resistant $CoSi_2$ through typical fabrication process including wet cleaning and rapid thermal process (RTP). We sputtered 15nm thick cobalt on the wafer and performed RTP annealing 2 times to obtain 60nm thick $CoSi_2$. We observed spherical shape voids with diameter of 40nm in the surface and inside $CoSi_2$ layers. The voids resulted in taking over abnormal junction leakage current and contact resistance values. We report that the voids in $CoSi_2$ layers are resulted from surface pits during the ion implantation previous to deposit cobalt layer. Silicide reaction rate around pits was enhanced due to Gibbs-Thompson effects and the volume expansion of the silicidation of the flat active regime trapped dimples. We confirmed that keeping the buffer oxide layer during ion implantation and annealing the silicon surface after ion implantation were required to prevent void defects in CoSi$_2$ layers.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.18 no.10
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• pp.93-98
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• 2019

Recently, with the development of the aerospace and automotive industries, the demand for high-melting-point materials has increased. However, high-melting-point materials are difficult to cut through conventional machining methods. Thermally assisted machining (TAM) is a method for improving the machinability by preheating the materials. A laser, the most commonly used device for TAM, has high efficiency through local preheating but is not sufficient for maintaining a high preheating temperature due to rapid cooling. However, the use of multi-heat sources can supplement the disadvantage of a single heat source. The high preheating temperature can be maintained with a wide and deep heat-affected zone (HAZ) by multi-heat sources. The purpose of this study is to analyze the preheating effects of multi-heat sources using laser plasma. Thermal analysis and preheating experiments were carried out. As a result, the high preheating effect of multi-heat sources compared with a single heat source was verified.

• Korean Journal of Materials Research
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• v.12 no.5
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• pp.382-386
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• 2002

We studied growth and characterization of $SrBi_2Ta_2O_9$ (SBT) thin films fabricated by low temperature process under vacuum and/or oxygen ambient. A metal organic decomposition (MOD) method based on a spin-on technique and annealing process using a rapid thermal annealing (RTA) method was used to prepare the SBT films. The crystallinity of a ferroelectric phase of SBT thin films is related to the oxygen partial pressure during RTA process. Under an oxygen partial pressure higher than 30 Torr, the crystallization temperature inducing the ferroelectric SBT phase can be lowered to $650^{\circ}C$. Those films annealed at $650^{\circ}C$ in vacuum and oxygen ambient showed good ferroelectric properties, that is, the memory window of 0.5~0.9 V at applied voltage of 3~7 V and the leakage current density of 1.80{\times}10^{-8}$ A/$\textrm{cm}^2$ at an applied voltage of 5V. In comparison with the SBT thin films prepared at 80$0^{\circ}C$ in $O_2$ ambient by furnace annealing process, the SBT thin films prepared at $650^{\circ}C$ in vacuum and oxygen ambient using the RTA process showed a good crystallization and electrical properties which would be able to apply to the virtul device fabrication precess.

• Journal of the Korean Regional Science Association
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• v.31 no.3
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• pp.99-112
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• 2015

Observation of land surface temperature in industrial areas is problematic, as it is not possible to construct a network of weather stations with sufficiently high density and continuous operation in such zones. Multiphase remote sensing data that cover a wide area and take a short time to process can enable the user to precisely and continuously measure the current and changing land surface temperatures in a certain region. Jeollanam-Do in South Korea is undergoing rapid industrialization, with the establishment of a number of industrial complexes, such as the Gwangyang Steelworks, Yeosu Industrial Complex, Yulchon Industrial complex, and Daebul Industrial Complex. To look into the properties of industrial complex's temperature, this study uses the thermal band of Landsat 7 ETM+ images acquired under thermal infrared wavelengths in order to calculate and compare the surface temperatures of the four above-named industrial complexes. From this, it is possible to obtain the basic information about industrial complex for environmental and natural resource management, which will aid industrial complex planners in developing methods of addressing environmental problems.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.233-233
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• 2010

CdS thin films were deposited on glass substrates by R.F. magnetron sputtering method and some of the samples were treated by rapid thermal annealing (RTA) process. Effects of thermal annealing on structural and optical properties were investigated at different temperatures ranging from 100 to $600^{\circ}C$. The crystallographic structure of the films and the size of the crystallites in the films were studied by X-ray diffraction. The crystallite sizes were found to increase, and the X-ray diffraction patterns were seen to sharpen by annealing. Optical properties of the films were calculated using the envelope method and the photoluminescence measurements. The optical properties of the films were seen to be dependent on the film thicknesses. The energy gap of the films was found to decrease by annealing. The band edge sharpness of the optical absorption was seen to oscillate by thermal annealing. Annealing over $400^{\circ}C$ was seen to degrade the optical properties of the film. The best annealing temperature for the films was found to be $400^{\circ}C$ from the optical properties. It is observed that the CdS film annealed at $400^{\circ}C$ reveals the strongest UV emission intensity and narrowest full width at half maximum among the temperature ranges studied. The enhanced UV emission from the film annealed at $400^{\circ}C$ is attributed to the improved crystalline quality of CdS thin film due to the effective relaxation of residual compressive stress and achieving maximum grain size. The results show that heat treatments under optimal annealing condition can provide significant improvements in the properties of CdS thin films.

• Journal of Electrochemical Science and Technology
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• v.15 no.3
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• pp.365-372
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• 2024

As the energy density of lithium-ion batteries (LIBs) continues to increase, various separators are being developed to with the aim of improving the safety performance. Although poly(imide) (PI)-based separators are widely used, it is difficult to control their pore size and distribution, and this may further increase the risk associated. Herein, a melamine phosphonic acid (MP)-coated PI separator that can effectively control the pore structure of the substrate is suggested as a remedy. After the MP material is embedded into the PI separator with a simple one-step casting process, it effectively clogs the large pores of the PI separator, preventing the occurrence of internal short circuits during charging. It is anticipated that the MP material can also suppress rapid thermal runaway upon cycling due to its ability to reduce the internal temperature of the LIB cell caused by the desirable endothermic behavior around 300℃. According to experiments, the MP-coated PI separator not only decreases the thermal shrinkage rate better than commercial poly(ethylene) (PE) separators but also exhibits a desirable Gurley number (109.6 s/100 cc) and electrolyte uptake rate (240%), which is unique. The proposed separator is electrochemically stable in the range 0.0-5.0 V (vs. Li/Li⁺), which is the typical working potential of conventional electrode materials. In practice, the MP-coated PI separator exhibits stable cycling performance in a graphite-LiNi_0.83Co_0.10Mn_0.07O₂ full cell without an internal short circuit (retention: 90.3%).

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.6
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• pp.1056-1063
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• 2006

Thermal evaporated 10 nm-Ni/l nm-Ir/(or polycrystalline)p-Si(100) and 10 nm-$Ni_{50}Co_{50}$/(or polycrystalline)p-Si(100) films were thermally annealed using rapid thermal annealing fur 40 sec at $300{\sim}1200^{\circ}C$. The annealed bilayer structure developed into Ni(Ir or Co)Si and resulting changes in sheet resistance, microstructure, phase and composition were investigated using a four-point probe, a scanning electron microscopy, a field ion beam, an X-ray diffractometer and an Auger electron spectroscope. The final thickness of Ir- and Co-inserted nickel silicides on single crystal silicon was approximately 20$\sim$40 nm and maintained its sheet resistance below 20 $\Omega$/sq. after the silicidation annealing at $1000^{\circ}C$. The ones on polysilicon had thickness of 20$\sim$55 nm and remained low resistance up to $850^{\circ}C$. A possible reason fur the improved thermal stability of the silicides formed on single crystal silicon substrate is the role of Ir and Co in preventing $NiSi_2$ transformation. Ir and Co also improved thermal stability of silicides formed on polysilicon substrate, but this enhancement was lessened due to the formation of high resistant phases and also a result of silicon mixing during high temperature diffusion. Ir-inserted nickel silicides showed surface roughness below 3 nm, which is appropriate for nano process. In conclusion, the proposed Ir- and Co- inserted nickel silicides may be superior over the conventional nickel monosilicides due to improved thermal stability.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.2
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• pp.95-102
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• 2001

Nano-scale gate length MOSFET devices require extremely shallow source/drain eftension region with junction depth of 20∼30nm. In this work, 20nm $n^{+}$-p junctions that are realized by using this $As_{2}^{+}$ low energy ($\leq$10keV) implantation show the lower sheet resistance of the $1.0k\Omega$/$\square$ after rapid thermal annealing process. The $As_{2}^{+}$ implantation and RTA process make it possible to fabricate the nano-scale NMOSFET of gate length of 70nm. $As_{2}^{+}$ 5 keV NMOSFET shows a small threshold voltage roll-off of 60mV and a DIBL effect of 87.2mV at 100nm gate length devices. The electrical characteristics of the fabricated devices with the heavily doped and abrupt $n^{+}$-p junctions ($N_{D}$〉$10^{20}$$cm^{-3}$, $X_{j}$$\leq$20nm) suggest the feasibility of the nano-scale NMOSFET device fabrication using the $As_{2}^{+}$ low energy ion implantation.