• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.11
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• pp.493-495
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• 2003

Accurate temperature measurement is a key factor to implement the rapid thermal processing(RTP). A temperature estimation method using acoustic wave has been proposed to overcome the inaccuracy and contamination problem of the previous methods. The proposed method, however, may suffer from the offset and low resolution problem since it is implemented in the time domain. This paper presents a temperature estimation method using the phase detection of acoustic wave. Based on the frequency domain approach, the proposed technique increases the resolution of the measured temperature and reduces the effect of noise. We investigate the performance of the proposed method via experiments.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.985-988
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• 2004

The carrier lifetime of boron doped Cz silicon samples after light induced degradation could be improved by optimized rapid thermal processing (RTP). The important five different parameters varied in order to investigate which parameter is important for the stable lifetime after light induced degradation, $\tau_d$. The Plateau temperature and the Plateau time influenced on the lifetime after light induced degradation. Especially, the Plateau temperature showed a strong influence on the stable lifetime. The optimal plateau temperature is approximately $900^{\circ}C$ t for a plateau time of 120 s. The stable lifetime increased from $15\mu}s$ to $25.5{\mu}s$. The normalized defect concentration, $N_t^*$, decreased from $0.06{\mu}s^{-1}$ to $0.037{\mu}s^{-1}$ by RTP-process.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.371-374
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• 2004

In this paper, Ni Germane-silicide formed on undoped $Si_{0.8}Ge_{0.2}$ as well as source/drain dopants doped $Si_{0.8}Ge_{0.2}$ was characterized by the four-point probe for sheet resistance. x-ray diffraction (XRD), x-ray photoelectron spectroscopy (XPS) and field emission scanning electron microscope (FESEM). Low resistive NiSiGe is formed by one step RTP (Rapid thermal processing) with temperature range at $500{\~}700^{\circ}C$. To enhance the thermal stability of Ni Germane-silicide, Ni/Co/TiN structure with different Co concentration were studied in this work. Low sheet resistance was obtained by Ni/Co/TiN structure with high Co concentration using 2-step RTP and it almost keeps the same low sheet resistance even after furnace annealing at $650^{\circ}C$ for 30 min.

• Korean Chemical Engineering Research
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• v.46 no.3
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• pp.486-491
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• 2008

This paper describes a model identification method that has been applied to a commercial 12-inch RTP (rapid thermal processing) equipment with an ultimate aim to develop a high-performance advanced controller. Seven thermocouples are attached on the wafer surface and twelve tungsten-halogen lamp groups are used to heat up the wafer. To obtain a MIMO balanced state space model, multiple SIMO (single-input multiple-output) identification with highorder ARX models have been conducted and the resulting models have been combined, transformed and reduced to a MIMO balanced state space model through a balanced truncation technique. The identification experiments were designed to minimize the wafer warpage and an output linearization block has been proposed for compensation of the nonlinearity from the radiation-dominant heat transfer. As a result from the identification at around 600, 700, and $800^{\circ}C$, respectively, it was found that $y=T(K)^2$ and the state dimension of 80-100 are most desirable. With this choice the root-mean-square value of the one-step-ahead temperature prediction error was found to be in the range of 0.125-0.135 K.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.11
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• pp.105-112
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• 1993

Oxide and reoxidized-nitrided-oxide were formed by furnace oxidation and rapid thermal processing (RTP). MOS capacitor and n-MOSFET's with those films as gate insulators were fabricated. The electrical characteristics of insulators were evaluated by current-voltage, high-frequency capacitance-voltage (C-V), and time-dependent dielectrical breakdown (TDDB) measurements. The hot carrier effects of MOSFET's were also investigated. Time-dependent dielectrical breakdown (TDDB) characteristics show that the life time of reoxidized-nitrided-oxide films is about 3 times longer than that of oxides. Hot carrier effects reveal that the life time of MOSFET's with reoxidized-nitrided-oxides is about 3 times longer than that of MOSFET's with oxides. Therefore, it is found that the reliability of dielectric films estimated by the hot carrier effects of MOSFET's is consistent with that of dielectric films from TDDB method.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.8
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• pp.602-610
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• 2012

The powders for the $Na_xWO_3$ (x= 1 and 0.75) sputtering targets were synthesized by the calcination in reductive atmosphere. Near single-phase $NaWO_3$ and single-phase $Na_{0.75}WO_3$ powder targets were prepared. By using the targets, thin films of each composition were deposited by rf magnetron sputtering on the $SiO_2$ (100 nm)/Si substrates and annealed by RTP (rapid thermal processing) for crystallization. In the case of the $NaWO_3$ composition, single-phase $Na_xWO_3$ thin films, where x was believed to be slightly less than 1, were fabricated accompanying the Na-diffusion into the substrates during RTP. However, in the case of the $Na_{0.75}WO_3$ thin film preparation, it was unable to make single-phase thin films. From the phase formation behaviors of both powders and thin films, it was revealed that $Na_xWO_3$ with nonstoichiometric composition of x, which was slightly less than 1, was favorable. The good electrical conduction properties were obtained from the single-phase $Na_xWO_3$ thin films. Their electrical resistivities were as low as $7.5{\times}10^{-4}{\Omega}{\cdot}cm$.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.704-704
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• 2013

CIGS 박막 태양전지는 I-III-VI족 화합물 반도체로서 직접천이형 에너지 밴드 구조를 가지고 있고, $1{\times}10$ cm의 높은 흡수계수를 가지고 있으며, Ga, Ag, Al을 첨가함으로써 밴드갭을 1~2.7 eV 넓은 범위로 조절가능하다. 본 연구의 목적은 Sputtering 방식과 Cracker cell을 이용한 실험으로 보다 효율적인 방식으로 CIGS 전구체 조성별 특성에 따른 구조와 전기적, 광학적 특성의 효과에 대하여 조사하였다. Cu-In-Ga 전구체는 CuGa(80-20 at.%)과 In(99.0%) target을 사용하여, Sputtering 공정으로 증착하였으며, Cracker cell이 부착된 RTP (rapid thermal processing)를 통하여 셀렌화를 진행하였다. Reservoir zone 온도는 320도, Cracking zone 온도는 900도로 유지하였으며, 진공상태에서 Se이 공급되면서 열처리가 진행되었다.Cu-In-Ga 전구체 구조에서 In의 증착시간을 변화시켜 CIGS 박막에 미치는 영향에 대해 분석하였다. 이때 기판온도는 $500^{\circ}C$로 고정하거나, $240^{\circ}C$ 열처리 후 $500^{\circ}C$에서 열처리하는 두가지를 적용하여 그 영향을 분석하였다. 또한 Selenium이 Cracking zone 온도와 열처리 시간에 따라 미치는 영향의 변화를 조사하였다. 이에 따른 CIGS 박막의 전기적 특성의 변화를 조사하였다.

• Korean Journal of Materials Research
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• v.9 no.9
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• pp.932-936
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• 1999

4NH(sub)3+$3O_2$$\longrightarrow$$2N_2$+$6H_2$O 의 화학반응식을 가지며$ O_2$ 및 $H_2$O를 산화제로 하는 $NH_3$/$O_2$산화의 성장모델을 세웠으며, 그 결과 Fick의 제 1 법칙을 기초로 하는 건식 및 습식 산화메카니즘으로 이해되는 Deal-Grove의 산화막 성장모델과 유사한 결과가 도출되었다. 이 성장모델에 의하면 산화제$ O_2$ 및 $H_2$O가 상호보완적으로 산화에 영향을 미치므로 산화온도 뿐 아니라 $NH_3$/O$_2$의 유량비도 산화율을 결정한다. rapid thermal processing(RTP)에 의한 산화막 성장실험으로 본 연구에서 제안하는 성장모델을 확인하였으며, NH$_3$분자의 분해에 의해 발생하는 N 원자의 산화막 내부확산을 secondary ion mass spectroscopy(SIMS)로 확인하였으며, Auger electron spectroscopy (AES) 측정결과 N 원자의 존재는 무시할만한 수준이었다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.6
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• pp.468-472
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• 2011

Conductive $SrMoO_3$ thin films were fabricated by RF magnetron sputtering with the powder-type sputtering target, and annealed for crystallization. When RTP (rapid thermal processing) in vacuum was applied, the fabricated thin films showed the mixed phases of $SrMoO_3$ and $SrMoO_4$, but $SrMoO_3$ phase could be promoted by the lowering of the working pressure during deposition. In order to eliminate $O_2$ gas during deposition and annealing, further lowering of the working pressure and furnace annealing in hydrogen atmosphere were tried. With the optimization of the deposition and annealing conditions, the thin film with nearly single-phase of $SrMoO_3$ was obtained, and it showed good electrical conduction properties with a low resistivity of $2.5{\times}10^{-3}{\Omega}{\cdot}cm$ at room temperature.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.619-622
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• 2005

본 논문에서는 서로 다른 Si 두께 ($T_{Si}$ = 27, 50 nm) 를 갖는 SOI (Silicon On Insulator) 기판 위에 다양한 두께의 Ni/Co를 순차적으로 증착한 후 Bulk-Si과의 비교를 통해 Silicide의 형성 특성에 대하여 분석하였다. 우선 급속 열처리 (RTP, Rapid Thermal Processing) 를 통하여 Silicide를 형성한 후 측정결과 Si두께에 따라 Silicide의 특성이 달라짐을 확인하였다. 두꺼운 두께의 Si-film을 갖는 SOI 기판을 사용한 경우 증착된 금속의 두께에 따라 Bulk-Si와 비슷한 면저항 특성을 보였으나, 얇은 두께의 Si-film을 갖는 SOI기판을 사용한 경우에는 제한된 Si의 공급으로 인한 Silicide의 비저항 증가로 인하여 증착된 금속의 두께에 따라 면저항이 감소하다가 다시 증가하는 'V' 자형 곡선을 나타내었다.