• Journal of Advanced Marine Engineering and Technology
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• v.39 no.1
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• pp.45-51
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• 2015

In this paper, we study the RF characteristics of the short wavelength thin-film transmission line employing microstrip line (ML)/coplanar waveguide (CPW) composite structure on silicon substrate for application to RFIC (radio frequency integrated circuit). The thin-film transmission line employing ML/CPW composite structure showed a wavelength shorter than conventional transmission lines. Concretely, at 10 GHz, the wavelength of the transmission line employing ML/CPW composite structure was 6.26 mm, which was 60.5 % of the conventional coplanar waveguide. We also extracted the bandwidth characteristic of the transmission line employing ML/CPW composite structure using equivalent circuit analysis. The S parameter of the equivalent circuit showed a good agreement with measured result. According to the bandwidth extraction result, the cut-off frequency of thin-film transmission line employing ML/CPW composite structure was 377 GHz. Above results indicate that the transmission line employing ML/CPW composite structure can be effectively used for application to broadband and compact RFIC.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.613-614
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• 2006

In this paper, BSIM4's IIR(Intrinsic Input Resistance) model that has a difficulty to predict $Z_{11}$ exactly is investigated by analyzing S-parameter measurement. Then a BSIM4 macro model for 70nm RF MOSFETs is proposed. That model uses external effective gate resistance which is composed of R and parallel RC. Comparison between simulation results using proposed model and IIR model is shown. The proposed model shows a better agreement between measured and simulated results up to 20GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.7 s.361
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• pp.96-104
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• 2007

In this paper, the field solver based deembedding technique for the on-chip inductors to deembed the pad and surrounding ground effect was described, and the results from field solver based deembedding techniques and measurement based matrix calculation method were compared. In addition, LNA circuit is designed by using deembedded inductors and fabricated by using standard $0.25{\mu}m$ CMOS process, in the range over the 2.5GHz it shows the good agreements between measurement and simulation results when the proper deembedding was adapted. Supposed deembedding techniques can be used to get the pure on-chip devices's values and adapted to design accurate RFIC circuit design.

• Transactions on Electrical and Electronic Materials
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• v.4 no.3
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• pp.5-9
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• 2003

In this paper, a layout-based CMOS RF model for RFIC's including the capacitance effect, the skin effect, and the proximity effect between metal lines on the Si surface is proposed for the first time for accurately predicting the RF behavior of CMOS devices. With these RF effects, the RF equivalent circuit model based on the layout of the multi-finger gate transistor is presented. The capacitances between metal lines on the Si surface are modeled with the layout. And the skin effect is modeled to the equivalent ladder circuit of metal line. The proximity effect is modeled by adding the mutual inductance between cross-coupled inductances in the ladder circuit representation. Compared to the BSIM 3v3 and other models, the proposed RF model shows better agreements with the measured data and shows well the frequency dependent behavior of devices in GHz ranges.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.4
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• pp.565-571
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• 2021

In this paper, a compensation scheme of frequency selective IQ mismatch for high-performance radar systems based on commercial RFIC's is proposed. Besides, an optimization model and its solution based on the dimension reduction scheme using singular value decomposition are also proposed to design the optimal IQ mismatch compensation digital filter with complex coefficients. The performance of the proposed method had been analyzed through experiments using the IQ mismatch measurement and compensation system implemented on an FPGA board with a target RFIC and compared with the previous method. The experiment result showed a performance improvement of the proposed method over the existing one without noticeable increments in complexities. These performance analysis results showed that the limitation of using commercial RFIC's in high-performance radar systems due to the undesirable maximum SNR cap caused by their IQ mismatches could be overcome by employing the proposed method.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.1
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• pp.94-101
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• 2009

This paper presents scalable modeling of spiral inductors for RFIC design based on $0.13{\mu}m$ RF CMOS process. For scalable modeling, several inductor patterns are designed and fabricated with variations of width, number of turns and inner radius. Feeding structures are optimized for accurate de-embedding of pad effects. After measuring the S parameters of the fabricated patterns, double-$\pi$ equivalent circuit parameters are extracted for each device and their geometrical dependences are modeled as scalable functions. The inductor library provides two types of models including standard and symmetric inductors. Standard and symmetric inductors have the range of $0.12{\sim}10.7nH$ and $0.08{\sim}13.6nH$ respectively. The models are valid up to 30GHz or self-resonance frequency. Through this research, a scalable inductor library with an error rate below 10% is developed for $0.13{\mu}m$ RF CMOS process.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.68-73
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• 2009

This paper presents an easily modifiable structure of a serial peripheral interface (SPI) that is suitable for efficient testing of CMOS RF integrated circuits. The proposed SPI Is designed so that the address size and the accompanying software can be easily adjusted and modified according to the requirements and complexity of RF IC's under development. The hardware architecture and software algorithm to achieve the flexibility are described. The proposed SPI is fabricated in $0.13{\mu}m$ CMOS and successfully verified experimentally with a 2.7GHz fractional-N delta-sigma frequency synthesizer as a device under test.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.6
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• pp.356-360
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• 2014

In this paper, the effect of underpass structure on quality factor and breakdown voltage of octagonal inductors which were fabricated with 90 nm complementary metal-oxide-semiconductor (CMOS) technology for radio frequency integrated circuit (RFIC) was studied. It was found that quality factor and breakdown voltage of inductors with more than one metal layer for underpass showed improved properties compared to those with one metal layer. However, little change of quality factor and breakdown voltage was observed between the inductors with two and more than two metal layers for underpass. Therefore, underpasses with two metal layers are promising for RFIC designs of the octagonal inductors in 90 nm CMOS technology.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.4
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• pp.28-39
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• 2007

This paper presents a programmable RF DFT (Radio Frequency Design-for-Testability) circuit for low noise amplifiers. We have developed a new on-chip RF DFT circuit that measures RF parameters of low noise amplifier (LNA) using only DC measurements [1, 2]. This circuit is extremely useful for today's RFIC devices in a complete RF transceiver environment. The DFT circuit contains test amplifier with programmable capacitor banks and RF peak detectors. The test circuit utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance and gain using the mathematical equations. Our on-chip DFT circuit can be self programmed for 1.8GHz, 2.4GHz and 5.25GHz low noise amplifiers for GSM, Bluetooth and IEEE802.11g standards. The circuit is simple and inexpensive.

• Journal of the Korea Society of Computer and Information
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• v.12 no.5
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• pp.83-92
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• 2007

In this paper, we present a design and implementation of three dimensional pointing device using Inertial Navigation System(INS) that acquires coordinates and location information without environmental dependancy. The INS measures coordinates based on the data from gyroscope and accelerometer and corrects the measured data from accelerometer using Kalman-Filter. In order to implement the idea of three dimensional pointing device, we choose a three dimensional Space-recognition mouse and use RFIC wireless communication to send a measured data to receiver for printing out the coordinate on display equipment. Based on INS and Kalman-Filter theoretical knowledge, we design and implement a three dimensional pointing device and verified the usability as an input device that can capture a human's move. also, we describe the applicability of this device in ubiquitous computing environment.