• ETRI Journal
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• v.25 no.3
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• pp.195-202
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• 2003

This paper proposes a new LDMOSFET structure with a trenched sinker for high-power RF amplifiers. Using a low-temperature, deep-trench technology, we succeeded in drastically shrinking the sinker area to one-third the size of the conventional diffusion-type structure. The RF performance of the proposed device with a channel width of 5 mm showed a small signal gain of 16.5 dB and a maximum peak power of 32 dBm with a power-added efficiency of 25% at 2 GHz. Furthermore, the trench sinker, which was applied to the guard ring to suppress coupling between inductors, showed an excellent blocking performance below -40 dB at a frequency of up to 20 GHz. These results confirm that the proposed trenched sinker should be an effective technology both as a compact sinker for RF power devices and as a guard ring against coupling.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.8
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• pp.555-559
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• 2003

In this paper, a new CMOS RF model for RF IC design including the capacitance effect, the skin effect, and the proximity effect between metal lines on the Si surface is proposed for tile first time for accurately predicting the RF behavior of CMOS devices. The capacitances between metal lines on the Si surface are modeled with the layout. And the skin effect is modeled with a parallel branch added in equivalent circuit of metal line. The proximity effect is modeled by adding the mutual inductance between cross-coupled inductances in the ladder circuit representation. Compared to the BSIM 3v3. the proposed RF model shows good agreements with the measured data and shows well the frequency dependent behavior of devices in GHz ranges.

• Proceedings of the IEEK Conference
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• 2000.09a
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• pp.911-914
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• 2000

본 논문에서는 배터리가 없는 ASK 전송방식의 RFID(Radio Frequency IDentification) Transponder 칩 설계에 관한 내용을 다룬다. Transponder IC는 power-generation 회로, clock-generation 회로, digital block, modulator, overoltge protection 회로로 구성된다. 설계된 칩은 저전력 회로를 적용하여 원거리 transponder칩을 구현할 수 있도록 하였다. 설계된 회로는 0.25㎛ 표준 CMOS 공정으로 레이아웃하여 제작하였다.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.3
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• pp.1-7
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• 1999

A single RF transceiver evaluation board have been developed for the purpose of application to the 900MHz band transceiver contained RF-IC chip And environment test was evaluated. The RF-IC chipset includes LNA(Low Noise Amplifier), down-conversion mixer, AGC(Automatic Gain Controller), switched capacitor filter and down sampling mixer. The RF evaluation board for the testing of chipset contained various external matching circuits, filters such as RF/IF SAW(Surface Acoustic Wave) filter and duplexer and power supply circuits. With the range of 2.7~3.3V the operated chip revealed moderate power consumption of 42mA. The chip was well operated at the receiving frequency of 925~960MHz. Measurement result is similar to general RF receiving specification of the 900MHz digital mobile phone.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.104-107
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• 2000

We designed and implemented the RFIC(RF front-end IC) for DTV(Digital TV) tuner. The DTV tuner RF front-end consists of low noise IF amplifier fur the amplification of 900 MHz RF signal and down conversion mixer for the RF signal to 44MHz IF conversion. The RFIC is implemented on ETRI 0.8u high resistive (2㎘ -cm) and evaluated by on wafer, packaged chip test. The gain and IIP3 of IF amplifier are 15㏈ and -6.6㏈m respectively. For the down conversion mixer gain and IIP3 are 13㏈ and -6.5㏈m. Operating voltage of the IF amplifier and the down mixer is 5V, current consumption are 13㎃ and 26㎃ respectively.

• The KIPS Transactions:PartA
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• v.10A no.3
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• pp.255-260
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• 2003

In recent, as a typical example of RFID, the contactless IC card is widely used in traffic, access control system and so forth. And its use becomes a general tendency more and more because of the development of RF technology and improvement of requirement for user convenience. This paper describes the hardware module to process embedded contactless protocol for implementation contactless IC card. And the hardware module consists of analog circuits and specific digital logic circuits. This paper also describes more effective design method of contactless IC card, which method separates into analog circuit parts, digital logic circuit part, and software parts according to the role of the design parts.

• Proceedings of the KIEE Conference
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• 2007.04a
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• pp.181-183
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• 2007

본 논문은 RF 리더기와 RF 태그 상호간의 통신시에 발생할 수 있는 충돌을 감지하고 이를 능동적으로 회피할수 있는 RFID(Radio Frequency IDentification)의 설계에 관한 내용이다. RFID는 사람, 자동차, 화물, 상품 등에 정보를 부가하는 시스템으로 그 부가정보를 무선통신매체를 이용하여 비접족으로 해독하는 시스템으로 기존의 바코드보다 데이터의 전송속도와 용량의 증가 그리고 편리성이 향상되는 장점이 있으나, 동시에 여러개의 RF태그와의 무선통신으로 인한 데이터의 충돌이 발생할 수 있다. 이러한 충돌을 감지하고 이를 적절하게 회피하는 것은 RFID 시스템의 신뢰성을 높이는데 필수적인 요소이다. RFID 태그로 사용되기 위해서는 건전지로 구동될 수 있도록 저전력소모가 요구되며 또한 통신의 시작과 충돌을 파악할 수 있는 캐리어 감지기능이 필수적이다. 본 논문에서는 이러한 조건들을 만족하는 Chipcon 사(社)의 양방향 RF IC를 사용하였다. Chipcon 사(社)의 양방향 RF IC는 다중 주파수 대역의 선택과 변조방식을 시리얼통신을 통해서 손쉽게 변경할 수 있기 때문에 충돌감지시 다양한 회피알고리즘을 상황에 맞게 구현할 수 있다. 본 논문에서는 양방향 RF IC를 사용하여 충돌을 감지하고 회피할 수 있는 RFID시스템을 설계하고 구현하였다.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.393-396
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• 1999

A circuit model of silicon substrate coupling for CMOS RF-IC design is developed. Its characteristics are analyzed by using a simple RC mesh model in order to investigate substrate coupling. The coupling effects due to the substrate were characterized with substrate resistivity, oxide thickness, substrate thickness. and physical distance. Thereby the silicon substrate effects are analytically investigated and verified with simulation. The analysis and simulation of the model have excellent agreements with MEDICI(2D device simulator) simulation results.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.172-180
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• 2003

Based on simulation results and accompanying analysis, we suggest a thyristor-type ESD protection device structure suitable for implementation in standard CMOS processes to reduce the parasitic capacitances added to the input nodes, which is very important in CMOS RF ICs. We compare DC breakdown characteristics of the suggested device to those of a conventional NMOS protection device to show the benefits of using the suggested device for ESD protection. The characteristic improvements are demonstrated and the corresponding mechanisms are explained based on simulations. Structure dependencies are also examined to define the optimal structure. AC simulation results are introduced to estimate the magnitude of reduction in the added parasitic capacitance when using the suggested device for ESD protection. The analysis shows a possibility of reducing the added parasitic capacitance down to about 1/40 of that resulting with a conventional NMOS protection transistor, while maintaining robustness against ESD.

• Journal of Korea Society of Industrial Information Systems
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• v.6 no.3
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• pp.123-127
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• 2001

The prediction method of the parameter C/sub gs/ of CMOS transistor is proposed by calculating the mobil charge in inversion layer of COMS transistor. This parameter C/sub gs/ decided on the cutoff frequency in MOS transistor in RF range and coupled input and output. This parameter C/sub gs/ in RF range is very important parameter in small signal circuit model. This proposed method is contributed to developing software of extracting parameter value in equivalent circuit model. The method provide the important information to construct a RF nonlinear model for multifinger gate MOSFET. This method will be very valuable to develop a large signal MOSFET model for nonlinear RF IC design.