• 제목/요약/키워드: RC4 hardware

검색결과 15건 처리시간 0.019초

New Reference Generation for a Single-Phase Active Power Filter to Improve Steady State Performance

  • Lee, Ji-Heon;Jeong, Jong-Kyou;Han, Byung-Moon;Bae, Byung-Yeol
    • Journal of Power Electronics
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    • 제10권4호
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    • pp.412-418
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    • 2010
  • This paper proposes a new algorithm to generate a reference signal for an active power filter using a sliding-window FFT operation to improve the steady-state performance of the active power filter. In the proposed algorithm the sliding-window FFT operation is applied to the load current to generate the reference value for the compensating current. The magnitude and phase-angle for each order of harmonics are respectively averaged for 14 periods. Furthermore, the phase-angle delay for each order of harmonics passing through the controller is corrected in advance to improve the compensation performance. The steady-state and transient performance of the proposed algorithm was verified through computer simulations and experimental work with a hardware prototype. A single-phase active power filter with the proposed algorithm can offer a reduction in THD from 75% to 4% when it is applied to a non-linear load composed of a diode bridge and a RC circuit. The active power filter with the proposed reference generation method shows accurate harmonic compensation performance compared with previously developed methods, in which the THD of source current is higher than 5%.

A Study on a Mobile Terminal Platform for a High Speed Mobile Multimedia System (초고속 이동멀티미디어 시스템을 위한 이동단말 플랫폼 연구)

  • Ro, Kwang-Hyun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • 제10권1호
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    • pp.96-103
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    • 2009
  • This paper presents a L3 mobile terminal platform of the mobile terminal system which is a subsystem of HMm(Hig-speed Mobile Multimedia) system, which layer 3 control protocols such as RC(Radio Control), SC(Session Control), MC(Mobility Control) and application services such as VOD, FTP, VoIP for a multimedia mobile terminal are implemented on. The hardware platform is based on PXA255 and supports various interfaces and multimedia devices, and under the platform, an embedded Linux generated by the self-maden cross-toolchain, L3 control protocols and application programs were installed. The operation of HMm system under the HMm testbed has shown that this platform successfully supported SIP services, web browsing services, streaming services and etc as well as call processing. It could be the reference of the upcoming Fourth-Generation mobile terminal which the multimedia functionality will be enforced.

Implementation and Flight Test Performance Analysis of vSLAM Aided Integrated Navigation System for Rotary UAV (vSLAM 보조 통합항법시스템 구현 및 무인 회전익기를 이용한 비행시험 성능분석)

  • Yun, Suk-Chang;Lee, Byoung-Jin;Yun, Suk-Hwan;Lee, Young-Jae;Sung, Sang-Kyung
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • 제39권4호
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    • pp.362-369
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    • 2011
  • In this paper, vSLAM aided integrated navigation system is implemented and performance analysis of the system is completed via flight test. The system can suppress divergence of position error of INS only system by updating vSLAM correction information when temporary GPS signal outage occurs in bad radio condition. In the flight test, integrated hardware containing GPS, IMU and camera is loaded under RC electric helicopter. Performance of the integrated navigation system is verified by comparing estimated position of INS/vSLAM system with that of INS only system.

On a High-Speed Implementation of LILI-128 Stream Cipher Using FPGA/VHDL (FPGA/VHDL을 이용한 LILI-128 암호의 고속화 구현에 관한 연구)

  • 이훈재;문상재
    • Journal of the Korea Institute of Information Security & Cryptology
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    • 제11권3호
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    • pp.23-32
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    • 2001
  • Since the LILI-128 cipher is a clock-controlled keystream generator, the speed of the keystream data is degraded in a clock-synchronized hardware logic design. Basically, the clock-controlled $LFSR_d$ in the LILI-128 cipher requires a system clock that is 1 ~4 times higher. Therefore, if the same clock is selected, the system throughput of the data rate will be lowered. Accordingly, this paper proposes a 4-bit parallel $LFSR_d$, where each register bit includes four variable data routines for feed feedback of shifting within the $LFSR_d$ . Furthermore, the timing of the propose design is simulated using a $Max^+$plus II from the ALTERA Co., the logic circuit is implemented for an FPGA device (EPF10K20RC240-3), and the throughput stability is analyzed up to a late of 50 Mbps with a 50MHz system clock. (That is higher than the 73 late at 45 Mbps, plus the maximum delay routine in the proposed design was below 20ns.) Finally, we translate/simulate our FPGA/VHDL design to the Lucent ASIC device( LV160C, 0.13 $\mu\textrm{m}$ CMOS & 1.5v technology), and it could achieve a throughput of about 500 Mbps with a 0.13$\mu\textrm{m}$ semiconductor for the maximum path delay below 1.8ns.

Design and Implementation of IEEE 802.11i MAC Layer (IEEE 802.11i MAC Layer 설계 및 구현)

  • Hong, Chang-Ki;Jeong, Yong-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제34권8A호
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    • pp.640-647
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    • 2009
  • IEEE 802.11i is an amendment to the original IEEE 802.11/b,a,g standard specifying security mechanism by stipulating RSNA for tighter security. The RSNA uses TKIP(Temporal Key Integrity Protocol) and CCMP(Counter with CBC-MAC Protocol) instead of old-fashioned WEP(Wired Equivalent Privacy) for data encryption. This paper describes a design of a communication security engine for IEEE 802.11i MAC layer. The design includes WEP and TKIP modules based on the RC4 encryption algorithm, and CCMP module based on the AES encryption algorism. The WEP module suffices for compatibility with the IEEE 802.11 b,a,g MAC layer. The CCMP module has about 816.7Mbps throughput at 134MHz, hence it satisfies maximum 600Mbps data rate described in the IEEE 802.11n specifications. We propose a pipelined AES-CCMP cipher core architecture, which has lower hardware cost than existing AES cores, because CBC mode and CTR mode operate at the same time.