• Journal of the Institute of Convergence Signal Processing
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• v.2 no.3
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• pp.50-56
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• 2001

As the fuzzy control is applied to servo system, the hardware implementation of the fuzzy information systems requires the high speed operations, short real time control and the small size systems. The aims of this study is to develop hardware of the fuzzy information systems to be apply to servo system. In this paper, we propose a calculation method of approximate reasoning for fuzzy control based on $\alpha$ -level set decomposition of fuzzy sets by quantize $\alpha$ -cuts. This method can be easily implemented with analog hardware. The influence of quantization Bevels of $\alpha$-cuts on output from fuzzy inference engine is investigated. It is concluded that 4 quantization levels give sufficient result for fuzzy control performance of dc servo system. The hardware implementation of proposed operation method and of the defuzzification by gravity center method which is directly converted to PWM actuating signal is also presented. It is verified useful with experiment for dc servo system.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.1222-1225
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• 2004

This paper presents multibit Sigma-Delta ADC using noise-shaped dynamic element matching(DEM). 5-bit flash ADC for multibit quantization in Sigma Delta modulator offers the following advantages such as lower quantization noise, more accurate white-noise level and more stability over single quantization. For the feedback paths consisting of DAC, the DAC element should have a high matching requirement in order to maintain the linearity performance which can be obtained by the modulator with a multibit quantizer. The DEM algorithm is implemented in such a way as to minimize additional delay within the feedback loop of the modulator Using this algorithm, distortion spectra from DAC linearity errors are shaped. Sigma Delta ADC achieves 82dB signal to noise ratio over 615H7z bandwidth, and 62mW power dissipation at a sampling frequency of 19.6MHz. This Sigma Delta ADC is designed to use 0.25um CMOS technology with 2.5V supply voltage and verified by HSPICE simulation.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.4 no.3
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• pp.322-326
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• 2004

This paper describes a new iris recognition method based on a shift-invariant wavelet sub-images. For the feature representation, we first preprocess an iris image for the compensation of the variation of the iris and for the easy implementation of the wavelet transform. Then, we decompose the preprocessed iris image into multiple subband images using a shift-invariant wavelet transform. For feature representation, we select a set of subband images, which have rich information for the classification of various iris patterns and robust to noises. In order to reduce the size of the feature vector, we quantize. each pixel of subband images using the Lloyd-Max quantization method Each feature element is represented by one of quantization levels, and a set of these feature element is the feature vector. When the quantization is very coarse, the quantized level does not have much information about the image pixel value. Therefore, we define a new similarity measure based on mutual information between two features. With this similarity measure, the size of the feature vector can be reduced without much degradation of performance. Experimentally, we show that the proposed method produced superb performance in iris recognition.

• ETRI Journal
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• v.38 no.1
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• pp.185-194
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• 2016

In this paper, a novel rate control scheme for low delay video coding of High Efficiency Video Coding (HEVC) is proposed. The proposed scheme is developed by considering a new temporal prediction structure of HEVC. In the proposed scheme, the relationship between bit rate and quantization step is exploited firstly to formulate an accurate quadratic rate-quantization (R-Q) model. Secondly, a method of determining the quantization parameters (QPs) for the first frames within a group of pictures is proposed. Thirdly, an accurate frame-level bit allocation method is proposed for HEVC. Finally, based on the proposed R-Q model and the target bit allocated for the frame, the QPs are predicted for coding tree units by using rate-distortion (R-D) optimization. We compare our scheme against that of three other state-of-the-art rate control schemes. Experimental results show that the proposed rate control scheme can increase the Bjøntegaard delta peak signal-to-noise ratio by 0.65 dB and 0.09 dB on average compared with the JCTVC-I0094 and JCTVC-M0036 schemes, respectively, both of which have been implemented in an HEVC test model encoder; furthermore, the proposed scheme achieves a similar R-D performance to Wang's scheme, as well as obtaining the smallest bit rate mismatch error of all the schemes.

• Journal of IKEEE
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• v.27 no.4
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• pp.573-578
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• 2023

This paper introduces a new locking technique applicable to high-performance digital Phase-Locked Loops (DPLL). The study employs additional thermometer codes to reduce quantization errors in LC-based Digital Controlled Oscillators (DCO). Despite not implementing the entire DCO codes in thermometer mode, this method effectively reduces quantization errors through enhanced linearity. In the initial locking phase, binary codes are used, and upon completion of locking, the system transitions to thermometer codes, achieving high frequency linearity and reduced jitter characteristics. This approach significantly reduces the number of switches required and minimizes the oscillator's area, especially in applications requiring low DCO gain (Kdco), compared to the traditional method that uses only thermometer codes. Furthermore, the jitter performance is maintained at a level equivalent to that of the thermometer-only approach. The efficacy of this technique has been validated through modeling and design at the RTL level using SystemVerilog and Verilog HDL.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.5
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• pp.147-154
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• 2015

In this paper, we employed a model which defines the sensitivity according to the background luminance, so called JND (Just Noticeable Difference), and applied to the video coding. The proposed method finds out the maximum possible quantization parameter for the current unit based on the threshold of JND model and reduce the bitrate with similar perceptual quality. It selects the higher quantization parameter and reduce the bitrate when the reconstructed signal which is coded with higher quantization parameter is in a range of allowance based on the JND threshold, i.e. the signal has the similar perceptual quality compared to that is coded with the initial quantization parameter. The proposed algorithm was implemented on HM16.0, which is a reference software of the latest video coding standard HEVC (High Efficiency Video Coding) and the coding performance was evaluated. Compared to HM16.0, the proposed algorithm achieved maximum 20.21% and 6.18% of average bitrate reduction with the similar perceptual quality.

• Journal of IKEEE
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• v.5 no.2 s.9
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• pp.221-231
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• 2001

In this paper, we propose an efficient requantization method for INTRA frames in heterogeneous transcoding from MPEG-1 to MPEG-4 simple profile. The quantizer for MPEG-1 INTRA MB usually uses a quantization weighting matrix while the quantizer for MPEG-4 simple profile doesn't. As a result, the quantization step sizes of the two quantizers may not be the same even for the same quantization parameter. Due to this mismatch in the quantization step site, the transcoded MPEG-4 sequence suffers from serious quality degradation and the number of bits produced by transcoding increases from the original MPEG-1 video sequence. To solve these problems, we propose an efficient method to find a near-optimum reconstruction level in the transcoder. We also present a PDF (probability distribution function) estimation method for the original DCT coefficients of MPEG-1 video sequence, which is required for the proposed requantization. Experimental results show that the proposed method gives $0.3{\sim}0.6dB$ improvement in PSNR over the conventional method, even at the reduced bit-rate about $5{\sim}7%$ from the conventional method.

• Journal of the Korean Institute of Intelligent Systems
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• v.26 no.5
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• pp.375-382
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• 2016

In this paper, we presents a signatures verification by using the nonlinear quantization histogram of polar coordinate based on multi-dimensional adjacent pixel intensity difference. The multi-dimensional adjacent pixel intensity difference is calculated from an intensity difference between a pair of pixels in a horizontal, vertical, diagonal, and opposite diagonal directions centering around the reference pixel. The polar coordinate is converted from the rectangular coordinate by making a pair of horizontal and vertical difference, and diagonal and opposite diagonal difference, respectively. The nonlinear quantization histogram is also calculated from nonuniformly quantizing the polar coordinate value by using the Lloyd algorithm, which is the recursive method. The polar coordinate histogram of 4-directional intensity difference is applied not only for more considering the corelation between pixels but also for reducing the calculation load by decreasing the number of histogram. The nonlinear quantization is also applied not only to still more reflect an attribute of intensity variations between pixels but also to obtain the low level histogram. The proposed method has been applied to verified 90(3 persons * 30 signatures/person) images of 256*256 pixels based on a matching measures of city-block, Euclidean, ordinal value, and normalized cross-correlation coefficient. The experimental results show that the proposed method has a superior to the linear quantization histogram, and Euclidean distance is also the optimal matching measure.

• IEIE Transactions on Smart Processing and Computing
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• v.1 no.3
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• pp.171-181
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• 2012

In the new video coding standard, called high efficiency video coding (HEVC), the coding unit (CU) is adopted as a basic unit of a coded block structure. Therefore, the rate control (RC) methods of H.264/AVC, whose basic unit is a macroblock, cannot be applied directly to HEVC. This paper proposes the largest CU (LCU) level RC method for hierarchical video coding in a HEVC. In the proposed method, the effective bit allocation is performed first based on the hierarchical structure, and the quantization parameters (QP) are then determined using the Cauchy density based rate-quantization (RQ) model. A novel method based on the linear rate model is introduced to estimate the parameters of the Cauchy density based RQ model precisely. The experimental results show that the proposed RC method not only controls the bitrate accurately, but also generates a constant number of bits per second with less degradation of the decoded picture quality than with the fixed QP coding and latest RC method for HEVC.

• Journal of Advanced Marine Engineering and Technology
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• v.33 no.8
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• pp.1246-1253
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• 2009

This paper presents derived a calculating form of fuzzy inference, based on decomposition of $\alpha$-level sets. Based on the calculating form it is propose that fuzzy logic circuits of PI+PD controller are a body from fuzzy inference to defuzzificaion in cases where the command variable u directly is generated PWM. The effect of quantization on $\alpha$-levels is investigated. with input/out characteristics of fuzzy controller by simulation. It is concluded that 4 quantization levels are sufficient result for fuzzy control performance of DC servo system. Simulation and experimental results demonstrated that the hardware implementation of the proposed controller can successfully provide good performance on the position control of DC servo system.