• Title/Summary/Keyword: QVGA

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A JPEG Quantization Table Design for Mobile QVGA Images (모바일 QVGA 영상을 위한 JPEG 양자화 테이블 설계에 대한 연구)

  • Jeong, Gu-Min;Lee, Jong-Deok;Kang, Dong-Wook
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.8 no.1
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    • pp.19-24
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    • 2008
  • This paper presents a new JPEG quantization table design method for mobile images in handset. From the characteristics of the mobile images, we propose a modeling method of the quantization table and select the optimized pre-emphasis factor from various sets of $240{\times}320$ images. From the experiment, we show that the performance is improved in the sense of bpp and PSNR, applying the proposed method.

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A 2.4-in QVGA p-Si LTPS AMLCD for Mobile Application

  • Chen, Yu-Cheng;Lin, Tai-Ming;Hsu, Tien-Chu
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1029-1032
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    • 2005
  • A 262K-color QVGA LTPS AMLCD was developed. This panel has integrated gate driver and data multiplexer (1:3) by p_Si LTPS TFT process. The commercialized driver IC was adopted to implement this display. Fine image quality, low powerconsumption and cost-efficiency feature make the panel be suitable for mobile application.

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Mixed Driving Circuit for QVGA-Scale LDI (QVGA급 LDI를 위한 혼합 구동 회로)

  • Ko, Young-Keun;Kwon, Yong-Jung;Lee, Sung-Woo;Kim, Hak-Yun;Choi, Ho-Yong
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.573-574
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    • 2008
  • In this paper, we propose a mixed driving circuit for the source driver of QVGA-scale TFT-LCD driver IC to reduce the area of the source driver. In the mixed driving circuit, graphic data pass or go through the mixed channel driver whether RGB data are the same or not. The mixed driving circuit has been designed in transistor level using the 0.35um CMOS technology and has been verified using Hspice.

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Improved Design of Graphic Memory for QVGA-Scale LCD Driver IC (개선된 QVGA급 LCD Driver IC의 그래픽 메모리 설계)

  • Cha, Sang-Rok;Lee, Bo-Sun;Kim, Hak-Yoon;Choi, Ho-Yong
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.589-590
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    • 2008
  • This paper describes an improved design of graphic memory for QVGA ($320{\times}240\;RGB$) - scale 262k-color LCD Driver IC. A distributor block is adopted to reduce graphic RAM area, which is accomplished with 1/8 data lines of the previous structure. In line-read operation, the drivabilty of memory array cell is improved by partitioning a word line according to the row address. The proposed graphic memory circuit has been designed in transistor level using $0.18{\mu}m$ CMOS technology library and verified using Hsim.

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Design of Graphic Memory for QVGA-Scale LCD Driver IC (QVGA급 LCD Driver IC의 그래픽 메모리 설계)

  • Kim, Hak-Yun;Cha, Sang-Rok;Lee, Bo-Sun;Jeong, Yong-Cheol;Choi, Ho-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.12
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    • pp.31-38
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    • 2010
  • This paper presents the design of a graphic memory for QVGA-scale LCD Driver IC (LDI). The graphic memory is designed based on the pseudo-SHAM for the purpose of small area, and the memory cell structure is designed using a bit line partitioning method to improve sensing characteristics and drivabilties in the line-read operation. Also, a collision protection circuit using C-gate is designed to control collisions between read/write operations and self-refresh/line-read operations effectively. The graphic memory circuit has been designed in transistor level using $0.18{\mu}m$ CMOS technology library and the operations of the graphic memory have been verified using Hspice. The results show that the bit-bitb line voltage difference, ${\Delta}V$ increases by 40%, the charge sharing time between bit and bitb voltages $T_{CHGSH}$ decreases by 30%, and the current during line-read decreases by 40%.

A Low Power Source Driver of Small Chip Area for QVGA TFT-LCD Applications

  • Hung, Nan-Xiong;Jiang, Wei-Shan;Wu, Bo-Cang;Tsao, Ming-Yuan;Liu, Han-Wen;Chang, Chen-Hao;Shiau, Miin-Shyue;Wu, Hong-Chong;Cheng, Ching-Hwa;Liu, Don-Gey
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.1005-1008
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    • 2007
  • In this study, an architecture for 262K-color TFT-LCD source driver. In this paper proposed the chip consumes smaller area and static current which is suitable for QVGA resolutions. In the conventional structures, all of them need large number of OPAMP buffers to drive the pixels, Therefore, highly resistive R-DACs are needed to generate gamma voltages to reduce the static current. In this study, our design only used two OPAMPs and low resistance RDACs without increasing the quiescent current. Thus, it was experted that chip would be more in consuming lower static power for longer battery lifetime. The source driver were implemented by the 3.3 V $0.35\;{\mu}m$ CMOS technology provided by TSMC. The area of the core OPAMP circuit was about $110\;{\mu}m\;{\times}\;150\;{\mu}m$ and that of the source driver was $880\;{\mu}m\;{\times}\;430\;{\mu}m$. As compared to the conventional structure, approximately 64.48 % in area was achieved.

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Design of a CMOS Image Sensor Based on a Low Power Single-Slope ADC (저전력 Single-Slope ADC를 사용한 CMOS 이미지 센서의 설계)

  • Kwon, Hyuk-Bin;Kim, Dae-Yun;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.2
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    • pp.20-27
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    • 2011
  • A CMOS Image Sensor(CIS) mounted on mobile appliances always needs a low power consumption because of the battery life cycle. In this paper, we propose novel power reduction techniques such as a data flip-flop circuit with leakage current elimination, a low power single slope A/D converter with a novel comparator, and etc. Based on 0.13um CMOS process, the chip satisfies QVGA resolution($320{\times}240$ pixels) whose pitch is 2.25um and whose structure is 4-Tr active pixel sensor. From the experimental results, the ADC in the middle of CIS has a 10-b resolution, the operating speed of CIS is 16 frame/s, and the power dissipation is 25mW at 3.3V(Analog)/1.8V(Digital) power supply. When we compare the proposed CIS with conventional ones, the power consumption is reduced approximately by 22% in sleep mode, 20% in operating mode.

Development of High Aperture Ratio 2.1” QVGA LTPS (Low Temperature Poly Si) LCD Using SLS (Sequential Lateral Solidification) Technology

  • Kang, Myung-Koo;Lee, Joong-Sun;Park, Jong-Hwa;Zhang, Lintao;Joo, Seung-Yong;Kim, Chul-Ho;Kim, Il-Kon;Kim, Sung-Ho;Park, Kyung-Soon;Yoo, Chun-Ki;Kim, Chi-Woo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1033-1034
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    • 2005
  • High resolution 2.1” QVGA LTPS LCD (190ppi) having high aperture ratio of 65% could be successfully developed using state-of-the-art SLS technology and active/gate storage structure. Cost effective P-MOS 6-Mask structure was used. Full gate and transmission gate circuits are integrated in the panel. The high aperture ratio was obtained by using active/gate capacitance structure, which can reduce storage capacitance area. The aperture ratio was increased to 65% from 49% of conventional gate/data capacitance structure. The brightness was increased from 180cd to 270cd without any degradation of optical properties such as contrast ratio, flicker or crosstalk.

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Implementation of Real-Time Multi-Camera Video Surveillance System with Automatic Resolution Control Using Motion Detection (움직임 감지를 사용하여 영상 해상도를 자동 제어하는 실시간 다중 카메라 영상 감시 시스템의 구현)

  • Jung, Seulkee;Lee, Jong-Bae;Lee, Seongsoo
    • Journal of IKEEE
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    • v.18 no.4
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    • pp.612-619
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    • 2014
  • This paper proposes a real-time multi-camera video surveillance system with automatic resolution control using motion detection. In ordinary times, it acquires 4 channels of QVGA images, and it merges them into single VGA image and transmit it. When motion is detected, it automatically increases the resolution of motion-occurring channel to VGA and decreases those of 3 other channels to QQVGA, and then these images are overlaid and transmitted. Thus, it can magnifies and watches the motion-occurring channel while maintaining transmission bandwidth and monitoring all other channels. When it is synthesized with 0.18 um technology, the maximum operating frequency is 110 MHz, which can theoretically support 4 HD cameras.

4 inch QVGA AMOLED display driven by GaInZnO TFT

  • Kwon, Jang-Yeon;Son, Kyoung-Seok;Jung, Ji-Sim;Kim, Tae-Sang;Ryu, Myung-Kwan;Park, Kyung-Bae;Kim, Jung-Woo;Lee, Young-Gu;Kim, Chang-Jung;Kim, Sun-Il;Park, Young-Soo;Lee, Sang-Yoon;Kim, Jong-Min
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.141-144
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    • 2007
  • We demonstrated 4 inch QVGA AMOLED display driven by GaInZnO TFT. The structure of GaInZnO TFT is back channel etch (BCE) which is conventional structure for a-Si TFT. The electron mobility of GaInZnO TFT is $2.6\;cm^2/Vs$ and Vt is 3.8V. It is thought that GaInZnO TFT could be backplane for AMOLED TV.

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