• Journal of Advanced Navigation Technology
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• v.20 no.1
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• pp.65-71
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• 2016

Quantum-dot cellular automata (QCA) consists of nano-scale cells and demands very low power consumption so that it is one of the alternative technologies that can overcome the limits of scaling CMOS technologies. Typical BCD-EXCESS 3 code converters using QCA have not considered the scalability so that the architectures are not suitable for a large scale circuit design. Thus, we design a BCD-EXCESS 3 code converter with scalability using QCADesigner and verify the effectiveness by simulation. Our structure have reduced 32 gates and 7% of garbage space rate compare with typical URG BCD-EXCESS 3 code converter. Also, 1 clock is only needed for circuit expansion of our structure though typical QCA BCD-EXCESS 3 code converter demands 7 clocks.

• Journal of Korea Society of Industrial Information Systems
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• v.19 no.6
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• pp.33-41
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• 2014

In this paper, we propose a D flip-flop based on quantum-dot cellular automata(QCA) clocking and design a programmable quantum-dot cell(QPCA) structure using the proposed D flip-flop. Previous D flip-flops on QCA are that input should be set to an arbitrary value, and wasted output values exist because it was utilized to duplicate by clock pulse and QCA clocking. In order to eliminate these defects, we propose a D flip-flop structure using binary wire and clocking technique on QCA. QPCA structure consists of wire control logic, rule control logic, D flip-flop and XOR logic gate. In experiment, we perform the simulation of QPCA structure using QCADesigner. As the result, we confirm the efficiency of the proposed structure.

• Journal of Advanced Navigation Technology
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• v.18 no.2
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• pp.178-184
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• 2014

CMOS technology based on PCA is very efficient at an implementation of memory or ALU. However, there has been a growing interest in quantum-dot cellular automata (QCA) because of the limitation of CMOS scaling. In this paper, we propose a design of PCA architecture based on QCA. In the proposed PCA design, we utilize D flip-flop and XOR logic gate without wire crossing technique, and design a input and rule control switches. In experiment, we perform the simulation of the proposed PCA architecture by QCADesigner. As the result, we confirm the efficiency the proposed architecture.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.26 no.3
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• pp.603-608
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• 2016

Encoding means converting or processing form or format of information into the other forms to standardize, secure, improve processing speed, store saving spaces and etc. Also, Encoding is converting the information so as to do transmit other form on the sender's information to the receiver in Information-Communication. The device that is conducting the processing is called the encoder. In this dissertation, proposes an encoder of the most basic 4-to-2 encoder. proposed encoder consists of two OR-gate and the proposed structure designs and optimize the spacing of the cell for the purpose of minimizing noise between wiring. Through QCADesigner conducts simulation of the proposed encoder and analyzes the results confirm the effectiveness.

• The Journal of the Convergence on Culture Technology
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• v.6 no.2
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• pp.515-520
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• 2020

CMOS used in digital circuit design technology has reached the limit of integration due to quantum tunneling. Quantum-dot cellular automata (QCA), which can replace this, has many advantages such as low power consumption and fast switching speed, so many digital circuits of CMOS have been proposed based on QCA. Among them, the multiplexer is a basic circuit used in various circuits such as D-flip-flops and resistors, and has been studied a lot. However, the existing multiplexer has a disadvantage that space efficiency is not good. Therefore, in this paper, we propose a new multilayered multiplexer using cell interaction and D-latch using it. The multiplexer and D-latch proposed in this paper have improved area, cell count, and delay time, and have excellent connectivity and scalability when designing large circuits. All proposed structures are simulated using QCADesigner to verify operation.

• The Journal of the Convergence on Culture Technology
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• v.7 no.1
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• pp.558-563
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• 2021

Quantum-Dot Cellular Automata is a next-generation nanocircular design technology that is drawing attention from many research organizations not only because it is possible to design efficient circuits by overcoming the physical size limitations of existing CMOS circuits, but also because of its energy-efficient features. In this paper, one of the existing digital circuits, T flip-flop circuit, is proposed using QCA. The previously proposed T flip-flops are designed based on the majority gate, so the circuits are complex and have long delays. Therefore, the design of the XOR gate-based T flip-flop using cell interaction reduces circuit complexity and minimizes latency. The proposed circuit is simulated using QCADesigner, and the performance is compared and analyzed with the existing proposed circuits.

• ETRI Journal
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• v.34 no.2
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• pp.284-287
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• 2012

Quantum-dot cellular automata (QCA) is one of the few alternative computing platforms that has the potential to be a promising technology because of higher speed, smaller size, and lower power consumption in comparison with CMOS technology. This letter proposes an optimized full comparator for implementation in QCA. The proposed design is compared with previous works in terms of complexity, area, and delay. In comparison with the best previous full comparator, our design has 64% and 85% improvement in cell count and area, respectively. Also, it is implemented with only one clock cycle. The obtained results show that our full comparator is more efficient in terms of cell count, complexity, area, and delay compared to the previous designs. Therefore, this structure can be simply used in designing QCA-based circuits.

• ETRI Journal
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• v.42 no.6
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• pp.912-921
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• 2020

Quantum-dot cellular automata (QCA) is an alternative complementary metal-oxide-semiconductor (CMOS) technology that is used to implement high-speed logical circuits at the atomic or molecular scale. In this study, an optimal 2-to-4 decoder in QCA is presented. The proposed QCA decoder is designed using a new formulation based on the MV32 gate. Notably, the MV32 gate has three inputs and two outputs, which is equivalent two 3-input majority gates, and operates based on cellular interactions. A multilayer design is suggested for the proposed decoder. Subsequently, a new and efficient 3-to-8 QCA decoder architecture is presented using the proposed 2-to-4 QCA decoder. The simulation results of the QCADesigner 2.0.3 software show that the proposed decoders perform well. Comparisons show that the proposed 2-to-4 QCA decoder is superior to the previously proposed ones in terms of cell count, occupied area, and delay.

• Advances in nano research
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• v.15 no.6
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• pp.521-531
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• 2023

Quantum-dot cellular automata (QCA) has shown great potential in the nanoscale regime as a replacement for CMOS technology. This work presents a specific approach to static random-access memory (SRAM) cell based on 2:1 multiplexer, 4-bit SRAM array, and 32-bit SRAM array in QCA. By utilizing the proposed SRAM array, a single-layer 16×32-bit SRAM with the read/write capability is presented using an optimized signal distribution network (SDN) crossover technique. In the present study, an extremely-optimized 2:1 multiplexer is proposed, which is used to implement an extremely-optimized SRAM cell. The results of simulation show the superiority of the proposed 2:1 multiplexer and SRAM cell. This study also provides a more efficient and accurate method for calculating QCA costs. The proposed extremely-optimized SRAM cell and SRAM arrays are advantageous in terms of complexity, delay, area, and QCA cost parameters in comparison with previous designs in QCA, CMOS, and FinFET technologies. Moreover, compared to previous designs in QCA and FinFET technologies, the proposed structure saves total energy consisting of overall energy consumption, switching energy dissipation, and leakage energy dissipation. The energy and structural analyses of the proposed scheme are performed in QCAPro and QCADesigner 2.0.3 tools. According to the simulation results and comparison with previous high-quality studies based on QCA and FinFET design approaches, the proposed SRAM reduces the overall energy consumption by 25%, occupies 33% smaller area, and requires 15% fewer cells. Moreover, the QCA cost is reduced by 35% compared to outstanding designs in the literature.