• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.622-625
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• 1999

This paper introduces a novel zero-voltage switching (ZVS)) pulse width modulation (PWM) active clamping dc-to-dc boost converter. This technique presents ZVS commutation without additional voltage stress and a significant increase in the circulating reactive energy throughout the converter. Therefore, all of the losses for the switches are minimized, and high power density system can be realized. The characteristics are verified through simulation and experimental results.

• Journal of Power Electronics
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• 제9권5호
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• pp.667-678
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• 2009

The PWM (Pulse Width Modulation) control signals have a drawback in that their power spectrum tends to be concentrated around the switching frequency and the resulting harmonic spikes cause an EMI (Electromagnetic Interference) and switching losses in semiconductors, etc. The SDM (Sigma-Delta Modulation) is a type of switching modulation used to reduce these harmonic spikes, and several SDM schemes are investigated in this paper. In the DSDM (Dithered SDM), the SDSDM (Space-Dithered SDM) and TDSDM (Time-Dithered SDM), the signals are classified by the location of their random dither additions. In these schemes, the switching frequency is spread by a random dither generator placed on the input or the output parts. Experimental results are presented where the advantages of the new proposed CDSDM (Combined Dithered SDM) are confirmed by applying to a buck converter.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.494-497
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• 2002

Conducted electromagnetic interference (EMI) from switch mode power supplies (SMPS) has become a major problem due to the proliferation of these devices employing dc-dc converters using standard pulse width modulation (PWM). In this paper, we proposed the sigma-delta modulation $({\sum}{\Delta}M)$ as an alternative switching technique to reduce the conducted EMI in SMPS. A comparative investigation on conducted EMI generated by PWM and ${\sum}{\Delta}M$ techniques are experimentally performed on a 300W Boost converter.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.401-401
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• 2009

Recently, demands for the development of compact, lightweight power supplies with higher power density and higher efficiency have been increased. Since Piezoelectric Transformer (PT) was emerged in device and material industry, it has been suggested as a viable alternative to the magnetic transformer in some applications. PT has some advantages such as low profile and mechanical energy transfer with little electromagnetic interface (EMI). Also, PT can provide high voltage stepping ratio with good isolation and requires no copper windings saving copper usage especially for large voltage conversion differences. Conventional control of PT converter has mainly two-way. One is the pulse frequency modulation (PFM) control method and the other is the pulse width modulation (PWM) control with frequency fixed method. It is known that the maximum PT efficiency can be obtained when it operates near the resonant frequency of the PT. And, also PT's resonant frequency moves according to the load condition. Therefore, selection of PT converter control method is very difficult. This paper analyzes general piezo-electric converter modeling and proposes a guide-line to selection of control method and stabilization control.

• Journal of Power Electronics
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• 제10권5호
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• pp.477-484
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• 2010

A pulse width modulation-voltage source inverter (PWM-VSI) is used for variable speed permanent magnet synchronous motor (PMSM) drives. The PWM-VSI fed PMSM has two major disadvantages. Firstly, the PWM-VSI DC-link voltage limits the magnitude of the PMSM terminal voltage. As a result, the motor speed is restricted. Secondly, in a low speed range, the PWM-VSI modulation index declines. This is caused by a high DC-link voltage and a low terminal voltage ratio. As a result, the distortion of the voltage command and the stator current are increased. This paper proposes an optimal pulse amplitude modulation (PAM) control which can adjust the inverter DC-link voltage by using a buck-boost DC-DC converter. At a low speed range, the proposed system can reduce the distortion of the voltage command, which improves the stator current waveform. Also, the allowable speed range is extended. In order to verify the proposed method, experimental results are provided to confirm the simulation results.

• IEIE Transactions on Smart Processing and Computing
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• 제4권5호
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• pp.371-378
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• 2015

In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator's efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.

• Journal of Power Electronics
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• 제19권2호
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• pp.475-486
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• 2019

This paper proposes the modulation and control of a three-to-six-phase matrix converter with an asymmetrical six-phase output. The matrix converter (MC) outputs consist of two sets of three-phase spatially shifted by $30^0$, where the two sets have two isolated neutrals. The space vector approach is considered for the modeling and subsequent modulation of the three-to-six phase MC. The intelligent selection of voltage space vectors is made to synthesize the reference voltages and to obtain a sinusoidal output. The dwell times of selected voltage space vectors are adjusted in such a way that the effect of the second and the third auxiliary plane vectors (i.e., x1-y1, and x2-y2) are nullified. To achieve the maximum output voltage gain and to ensure that no reactive power is drawn from the utility supply, the input side power factor is maintained at unity. Nevertheless, the source side power factor is controllable. The modulation technique is implemented in dSPACE working in conjunction with a FPGA. Hardware results that validate the proposed control algorithm are discussed.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1997년도 전력전자학술대회 논문집
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• pp.1-8
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• 1997

PWM(Pulse Width Modulation) 컨버터의 제어에 있어서, 입력전압의 왜곡을 고려하지 않을 경우, 시스템의 성능 저하를 초래하게 된다. 본 논문은 왜곡된 3상 입력전압이 PWM 컨버터에 미치는 영향을 분석하고, 성능을 개선하기 위한 제어기를 설계한다. 제안된 방식은 단위 역률을 만족시키면서, THD(Total Harmonic Distortion) 및 DC-link 전압의 저차 ripple을 감소시킨다.

• Journal of Power Electronics
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• 제18권2호
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• pp.604-614
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• 2018

This paper proposes a synchronous switching technique for a Vienna rectifier that uses carrier-based pulse width modulation (CB-PWM). A three-phase Vienna rectifier, similar to a three-level T-type converter with three back-to-back switches, is used as a PWM rectifier. Conventional CB-PWM requires six independent gate signals to operate back-to-back switches. When internal switches are operated synchronously, only three independent gate signals are required, which simplifies the construction of gate driver circuits. However, with this method, total harmonic distortion of the input current is higher than that with conventional CB-PWM switching. A reactive current injection technique is proposed to improve current distortion. The performance of the proposed synchronous switching method and the effectiveness of the reactive current injection technique are verified using simulations and experiments performed with a set of Vienna rectifiers rated at 5 kW.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2006년도 전기학술대회논문집
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• pp.249-250
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• 2006

In this paper, hardware design and implementation of digital controller for the High Precision Digital Power Supply (HPDPS) based on Digital Signal Processor (DSP) and Field Programmable Gate Array (FPGA) is presented. Developed digital controller is composed of high resolution Digital Pulse Width Modulation (DPWM) and high resolution analog to digital converter circuit with anti-aliasing filter. And Digital Signal Processor (DSP) has the capability of a few micro-second calculation time for one feedback loop. 32-bit DSP and DPWM with 150[ps] step resolution is used to implement the HPDPS. Also 18-bit 2 mega sample per second ADC board is adopted for the developed digital controller. Also, hardware structure of the developed digital controller and experimental results of the first prototype board for HPDPS is described.