• Title/Summary/Keyword: Program Verification

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Simulation of Dynamic Characteristics of Agricultural Tractors(II) - Verification of Dynamic Model - (농용 트랙터의 동특성 시뮬레이션(II) - 동적 모델의 검증 -)

  • 박홍제;김경욱
    • Journal of Biosystems Engineering
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    • v.23 no.6
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    • pp.549-560
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    • 1998
  • The dynamic model of a tractor-trailer system developed in the first part of this paper was verified in this article by comparing the simulated acceleration responses of the system with actually measured ones. A commercially available tractor and a trailer were used for the verification test. Values of the model parameters were measured or theoretically derived if the measurement was practically impossible. The tractor-trailer system was operated with different forward speeds over three equally spaced half-sine bumps on the flat concrete surface. Results of the verification tests showed that autospectra of the measured and simulated accelerations of the tractor-trailer system agreed well up to the frequencies slightly feater than the fundamental frequencies of the ground excitations and at the frequencies of engine excitations. The mean of normalized errors of the simulated responses to the measured ones was estimated to be less than 10% for all the test runs. The peak responses in the autospectra also coincided well both in the frequency and magnitude.

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Design of a Cell Verification Module for Large-density EEPROM Memories (대용량 EEPROM 메모리 셀 검증용 모듈 회로 설계)

  • Park, Heon;Jin, RiJun;Ha, Pan-Bong;Kim, Young-Hee
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.10 no.2
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    • pp.176-183
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    • 2017
  • There is a problem of long erase and program times in testing large-density memories. Also, there is a need of testing the VT voltages of EEPROM cells at each step during the reliability test. In this paper, a cell verification module is designed for a 512kb EEPROM and a CG (control gate) driver is proposed for measuring the VT voltages of a split gate EEPROM having negative erase VT voltages. In the proposed cell verification module, asymmetric isolated HV (high-voltage) NMOS devices are used to apply negative voltages of -3V to 0V in measuring erase VT voltages. Since erasing and programming can be done in units of even pages, odd pages, or a chip in the test time reduction mode, test time can be reduced to 2ms in testing the chip from 4ms in testing the even and the odd pages.

Development of an Verification System for Enhancing BIM Design Base on Usability (활용성을 고려한 BIM 설계 오류 검증시스템 개발)

  • Yang, Dong-Suk
    • Land and Housing Review
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    • v.8 no.1
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    • pp.23-29
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    • 2017
  • The BIM design is expected to expand to the domestic and overseas construction industries, depending on the effect of construction productivity and quality improvement. However, with the obligation of Public Procurement Service to design the BIM design, it includes a design error and the problem of utilization of 3D design by choosing a simple 2D to 3D remodelling method that can not be modelled in 3D modeling or use of the construction and maintenance phases. The results reviewed by BIM design results were largely underutilized and were not even performed with the verification of the error. In order to resolve this, one must develop the check system that secures the quality of BIM design and ensure that the reliability of BIM results are available. In this study, it is designed to develop a program that can automatically verify the design of the BIM design results such as violation of the rules of the BIM design, design flaws, and improve the usability of the BIM design. In particular, this programs were developed not only to identify programmes that were not commercially available, but also to validate drawings in low-light computer environments. The developed program(LH-BIM) store the information of attribute extracted from the Revit file(ArchiCAD, IFC file included) in the integrated DB. This provides the ability to freely lookup the features and properties of drawings delivered exclusively by the LH-BIM Program without using the Revit tools. By doing so, it was possible to resolve the difficulties of using traditional commercial programs and to ensure that they operate only with traditional PC performance. Further, the results of the various BIM software can be readily validated, which can be solved the conversion process error of IFC in the case of SMC. Additionally, the developed program has the ability to automatically check the error and design criteria of the drawings, as well as the ability to calculate the area estimation. These functions allow businesses to apply simple and easy tasks to operate tasks of BIM modelling. The developed system(LH-BIM) carried out a verification test by reviewing the review of the BIM Design model of the Korea Land & Housing Corporation. It is hoped that the verification system will not only be able to achieve the Quality of BIM design, but also contribute to the expansion of BIM and future construction BIM.

A Study on Verification and Editing of NC Part-program (NC파트프로그램의 검증 및 오류 수정에 관한 연구)

  • 김찬봉;박세형;양민양
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.17 no.5
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    • pp.1074-1083
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    • 1993
  • NC simulation has been used to replace the test cutting of NC machining. Although it can reduce the NC part programming effort, it still has a problem. If any error is found during the simulation, then the part has to be reprogrammed and it is time consumming. This paper presents a method for verifying and editing the NC code after the post-processing without going back to the part programming stage. A data structure and an algorithm to verify and edit the NC code interactively with the aid of graphics is introduced. Z-map method is used for the shaded image display and cross-sectional view display of the macined parts. The method was implemented in a IBM/PC-386 with MS-Windows software, and the multi-window function of the of the MS-Windows is used for the simultaneous editing and verification.

Determining Kimbab Shelf-life with a HACCP System (HACCP을 적용하여 생산한 김밥의 유통기한 설정)

  • Lee, Jin-Hyang;Bae, Hyun-Joo
    • Korean journal of food and cookery science
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    • v.27 no.2
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    • pp.61-71
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    • 2011
  • This study was conducted to estimate the shelf-life of Kimbab manufactured using a Hazard Analysis and Critical Control Point (HACCP). We performed a microbiological verification after applying the HACCP plan to Kimbab. Additionally, the shelf-life of Kimbab at each holding temperature was calculated as a regression equation between the aerobic plate counts and holding time during the storage period. The critical control points of the HACCP plan, that were applied to Kimbab, included: cold-holding of refrigerated foods, checking the endpoint cooking temperature of heated food, and cold-holding of cooked foods. As a result of the microbiological verification of Kimbab, the aerobic plate counts averaged 3.46 log CFU/g. In contrast, the coliforms, E. coli, Staphylococcus aureus, and Salmonella spp. were not detected in any of the samples. The estimated shelf-life of Kimbab was calculated to be 45 hours at $10^{\circ}C$, 29 hours at $15^{\circ}C$, 6 hours at $25^{\circ}C$ and 3 hours at $35^{\circ}C$. In conclusion, manufacturers should apply a prerequisite program and a HACCP system for a safe consumption of ready-to-eat foods and label products with a proper shelf-life. Distributors should control the proper holding time-temperature until sale and consumers should eat immediately after purchasing ready-to-eat foods.

A Template Based Process Modeling Methodology for Control Simulation (제어 시뮬레이션을 위한 템플릿기반 공정 모델링 방법론)

  • Shin, Hye-Seon;Ko, Min-Suk;Hong, Sang-Hyun;Park, Sang-Chul;Wang, Gi-Nam
    • Korean Journal of Computational Design and Engineering
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    • v.16 no.5
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    • pp.351-360
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    • 2011
  • Product systems are quickly and frequently changed because Product Life Cycle is continuously reduced and adopting new product is steadily fast. Thus, various studies are progressed using simulation which is one of digital manufacturing. The research that is concerning simulation of control verification for shorten the commissioning which has a lot of trial and error is in progress. Also, simulation of control verification has strength that it can catch the errors in advance. However, a control program in simulation needs virtual factory for representation of control information. For this reason, excessive time and energy is put into controlling the virtual factory. So, in this paper, we construct library which is using exist data, in order to overcome limitation of these problems. Furthermore, we suggest methodology which can model and verify the process more speedy using library. Especially, we give body to the BB/BR Line process which has many altering equipment and need high technology effectively using physical and logical modeling. We can set up a control simulation environment very rapidly, as well as cut process time down using our suggestion.

Development of Measurement System for Traction and Braking Performances in KTX (KTX 견인, 재동성능용 계측시스템 구축)

  • 김석원;한영재;김영국;박찬경;최강윤;김종영
    • Proceedings of the KSR Conference
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    • 2003.10a
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    • pp.216-223
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    • 2003
  • In this paper, we introduce the software and hardware of the measuring system for performances of traction and braking in KTX(Korea Train eXpress). The measuring system focuses on the verification of the performance and acquisition of test data. The software controls the hardware of the measuring system, performs the analysis and calculation of measurement data and acts as interface between users and the hardware. For this purpose, three programs, such as a measuring program, a back-up program and a post-processing program, have developed.

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Automatic Design of Hot Forging (열간단조의 자동설계)

  • 김대영;박종진
    • Proceedings of the Korean Society for Technology of Plasticity Conference
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    • 1997.03a
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    • pp.171-174
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    • 1997
  • In this study, a computer program was developed which generates automatically a drawing of the forging design in axisymmetric hot-forging of steel. The program designs a forging envelope from a machined part geometry according to forging design rules: parting line, draft angles, fillet and corner radii, minimum web and rib thicknesses. For the purpose of verification, the program was applied to a machined part from a factory. It was found that the generate forging design agreed well with the actual one used in the factory.

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Study on the Shifting Transients by Interfacing ECU with Simulation Program (자동변속장치 ECU와 프로그램의 Interface에 의한 변속과도특성 연구)

  • 조한상;박영일
    • Journal of the Korean Society of Safety
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    • v.10 no.3
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    • pp.21-29
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    • 1995
  • The automotive transmission is the principal component of the power transmission system which converts the engine power into the adjustable power for the vehicle driving system. To the unskilled driver the automization of transmission is required for the safety and fuel economy. In this study, the dynamic model of the automotive power transmission system was presented and simulation program and interface board which interface IBM-PC with ECU was devloped. Through the traveling simulation by interfacing ECU with simulation program, the shifting transients are investigated. For verification of simulation experiment was carried out, the results of simulation was agreed well with those of simulation.

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Diagnosis Design Using Embedded Transmission Simulator (임베디드 변속기 시뮬레이터를 이용한 진단알고리즘 설계)

  • Jung, G.H.;Kim, K.D.
    • 유공압시스템학회:학술대회논문집
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    • 2010.06a
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    • pp.56-61
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    • 2010
  • Simulator is a development equipment which enables the ECU to operate in normal mode by simulating the interface signal between ECU and mechanical system electrically. Embedded simulator means simulation function is embedded in ECU firmware, hence the electrical signal interface is replaced by the substitution of information at system program level. This paper explains the development of embedded transmission simulator for the verification of TCU firmware function which covers shifting control and on-board diagnosis. The embedded simulation program is executed in TCU processor along with the TCU firmware and it provides TCU firmware with not only the speed information those are appropriate both in driving and shifting conditions, but also the fault detection signals. Experimental results show that the validity of embedded simulator and its usefulness to the TCU firmware development and verification.

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