• Title/Summary/Keyword: Program Verification

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A compatibility verification environment for HDL-modeled microprocessors

  • 이문기;김영완;서광수;손승일
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.2
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    • pp.409-416
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    • 1996
  • This paper describes the simulation environment that verifies whether a new microporcessor described with HDL is compatible with an existing microprocessor. The compatibility verification is done by showing that the new microprocessor executes the OS(Operating System) program used in the existing microprocessor without any modification of its binary code. The proposed verification environment consists of a virtual system and a graphic user interface (GUI) module. Each module is independently designed based on serve-client model and three exists a communication part for information interchange between the two modules. This paper describes the method of constructing the verification environment and presents the compatibility verification environment of the x86 microprocessor as the simulation result.

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Design of a Vehicle Assembly Line Using PLC Simulation (PLC 시뮬레이션을 이용한 자동차 조립 라인 설계)

  • Lee, Chang-Ho;Wang, Gi-Nam;Park, Sang-Chul
    • Korean Journal of Computational Design and Engineering
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    • v.14 no.5
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    • pp.323-329
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    • 2009
  • Auto-makers can only remain competitive by producing high quality vehicles in an efficient way. In designing a production line, one of the most important objectives of digital manufacturing is to verify design errors as early as possible. In terms of the cost and time saving, it is very essential to start the construction of a production line with a proven design which is error-free. Likewise, this paper aims to implement PLC verification using an example. The verification in automobile manufacturing means verifying PLC program, which control automatic devices. In this paper, we built a virtual factory to implement PLC simulation and introduced verification procedure using PLC Studio. Finally, we can prove the availability for the PLC verification.

Development on the M&V Protocol for DSM Investment Program (수요관리 투자사업의 성과검증(M&V)모형 개발)

  • Cho, Sung-Hwan;Choi, Bong-Ha;Kim, Euy-Kyung;Jeon, Ho-Cheol
    • Proceedings of the SAREK Conference
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    • 2008.06a
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    • pp.237-242
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    • 2008
  • DSM(Demand Side Management) is reducing the load of energy supply utility through energy conservation and energy load distribution. This kind of program is necessary especially to our country which import above 97% of energy source. But the effectiveness of this kind program is not verified well even though our country is executing the various DSM programs. This study suggests M&V(Monitoring & Verification) guideline for DSM programs which are executing in Korea and shows the results which applied to verification of DSM programs.

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Career counseling of University Students before and after Differences in career maturity verification (대학생의 진로상담프로그램 실시전후의 진로성숙도 차이검증)

  • Kwon, Eun-Kyoung
    • Journal of Digital Convergence
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    • v.11 no.7
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    • pp.75-81
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    • 2013
  • In this study, career counseling collegiate career maturity differences before and after program implementation through proven collegiate career counseling program development and future of the University Career guidance and on the basis of the direction is set. Verification results first college career counseling program has not been applied to the experimental group than in the control group were improved career attitude maturity level.

Roadmap Toward Certificate Program for Trustworthy Artificial Intelligence

  • Han, Min-gyu;Kang, Dae-Ki
    • International journal of advanced smart convergence
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    • v.10 no.3
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    • pp.59-65
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    • 2021
  • In this paper, we propose the AI certification standardization activities for systematic research and planning for the standardization of trustworthy artificial intelligence (AI). The activities will be in two-fold. In the stage 1, we investigate the scope and possibility of standardization through AI reliability technology research targeting international standards organizations. And we establish the AI reliability technology standard and AI reliability verification for the feasibility of the AI reliability technology/certification standards. In the stage 2, based on the standard technical specifications established in the previous stage, we establish AI reliability certification program for verification of products, systems and services. Along with the establishment of the AI reliability certification system, a global InterOp (Interoperability test) event, an AI reliability certification international standard meetings and seminars are to be held for the spread of AI reliability certification. Finally, TAIPP (Trustworthy AI Partnership Project) will be established through the participation of relevant standards organizations and industries to overall maintain and develop standards and certification programs to ensure the governance of AI reliability certification standards.

A Formal Verification Technique for PLC Programs Implemented with Function Block Diagrams (함수 블록 다이어그램으로 구현된 PLC 프로그램에 대한 정형 검증 기법)

  • Jee, Eun-Kyoung;Jeon, Seung-Jae;Cha, Sung-Deok
    • Journal of KIISE:Computing Practices and Letters
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    • v.15 no.3
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    • pp.211-215
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    • 2009
  • As Programmable Logic Controllers (PLCs) are increasingly used to implement safety critical systems such as nuclear instrumentation & control system, formal verification for PLC based programs is becoming essential. This paper proposes a formal verification technique for PLC program implemented with function block diagram (FBD). In order to verify an FBD program, we translate an FBD program into a Verilog model and perform model checking using SMV model checker We developed a tool, FBD Verifier, which translates FBD programs into Verilog models automatically and supports efficient and intuitive visual analysis of a counterexample. With the proposed approach and the tool, we verified large FBD programs implementing reactor protection system of Korea Nuclear Instrumentation and Control System R&D Center (KNICS) successfully.

Reliability Verification of Evidence Analysis Tools for Digital Forensics (디지털 포렌식을 위한 증거 분석 도구의 신뢰성 검증)

  • Lee, Tae-Rim;Shin, Sang-Uk
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.21 no.3
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    • pp.165-176
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    • 2011
  • In this paper, we examine the reliability verification procedure of evidence analysis tools for computer forensics and test the famous tools for their functional requirements using the verification items proposed by standard document, TIAK.KO-12.0112. Also, we carry out performance evaluation based on test results and suggest the way of performance improvement for evidence analysis tools. To achieve this, we first investigate functions that test subjects can perform, and then we set up a specific test plan and create evidence image files which contain the contents of a verification items. We finally verify and analyze the test results. In this process, we can discover some weaknesses of most of analysis tools, such as the restoration for deleted & fragmented files, the identification of the file format which is widely used in the country and the processing of the strings composed of Korean alphabet.