• Title/Summary/Keyword: Process Reconfiguration

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I/E Selective Activation based Knowledge Reconfiguration mechanism and Reasoning

  • Shim, JeongYon
    • IEIE Transactions on Smart Processing and Computing
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    • v.3 no.5
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    • pp.338-344
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    • 2014
  • As the role of information collection becomes increasingly important in the enormous data environment, there is growing demand for more intelligent information technologies for managing complex data. On the other hand, it is difficult to find a solution because of the data complexity and big scaled amount. Accordingly, there is a need for a special intelligent knowledge base frame that can be operated by itself flexibly. In this paper, by adopting switching function for signal transmission in the synapse of the human brain, I/E selective activation based knowledge reconfiguring mechanism is proposed for building more intelligent information management system. In particular, knowledge network design, a special knowledge node structure, Type definition, I/E gauge definition and I/E matching scheme are provided. Using these concepts, the proposed system makes the functions of activation by I/E Gauge, selection and reconfiguration. In a more efficient manner, the routing and reasoning process was performed based on the knowledge reconfiguration network. In the experiments, the process of selection by I/E matching, knowledge reconfiguration and routing & reasoning results are described.

Traffic Prediction based Multi-Stage Virtual Topology Reconfiguration Policy in Multi-wavelength Routed Optical Networks (다중 파장 광 네트워크 상에서 트래픽 예상 기법 기반 다단계 가상망 재구성 정책)

  • Lin Zhang;Lee, Kyung-hee;Youn, Chan-Hyun;Shim, Eun-Bo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.8C
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    • pp.729-740
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    • 2002
  • This paper studies the issues arising in the virtual topology reconfiguration phase of Multi-wavelength Routed Optical Networks. This reconfiguration process means to change the virtual topology in response to the changing traffic patterns in the higher layer. We formulate the optimal reconfiguration policy as a multi-stage decision-making problem to maximize the expected reward and cost function over an infinite horizon. Then we propose a new heuristic algorithm based on node-exchange to reconfigure the virtual topology to meet the traffic requirement. To counter the continual approximation problem brought by heuristic approach, we take the traffic prediction into consideration. We further propose a new heuristic reconfiguration algorithm called Prediction based Multi-stage Reconfiguration approach to realize the optimal reconfiguration policy based on predicted traffic. Simulation results show that our reconfiguration policy significantly outperforms the conventional one, while the required physical resources are limited.

Active Distribution Network Expansion Planning Considering Distributed Generation Integration and Network Reconfiguration

  • Xing, Haijun;Hong, Shaoyun;Sun, Xin
    • Journal of Electrical Engineering and Technology
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    • v.13 no.2
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    • pp.540-549
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    • 2018
  • This paper proposes the method of active distribution network expansion planning considering distributed generation integration and distribution network reconfiguration. The distribution network reconfiguration is taken as the expansion planning alternative with zero investment cost of the branches. During the process of the reconfiguration in expansion planning, all the branches are taken as the alternative branches. The objective is to minimize the total costs of the distribution network in the planning period. The expansion alternatives such as active management, new lines, new substations, substation expansion and Distributed Generation (DG) installation are considered. Distribution network reconfiguration is a complex mixed-integer nonlinear programming problem, with integration of DGs and active managements, the active distribution network expansion planning considering distribution network reconfiguration becomes much more complex. This paper converts the dual-level expansion model to Second-Order Cone Programming (SOCP) model, which can be solved with commercial solver GUROBI. The proposed model and method are tested on the modified IEEE 33-bus system and Portugal 54-bus system.

A Study of Reconfiguration for Load Balancing in Distribution Power System (배전계통 부하 균등화를 위한 재구성에 관한 연구)

  • Seo, Gyu-Seok;Baek, Young-Sik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.8
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    • pp.1360-1366
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    • 2007
  • In this paper, the load balancing which is one of the distribution power system's operation purposes was studied. Reconfiguration of Distribution power system presents that the configuration is changed by changing the switch on/off status which exists in the system according to the mentioned purpose. Through this method, the load of distribution power system is shown to be balanced. As a characteristic of complicated distribution power system, system is designed by being applied by OOP(Object Oriented Programming) method which connected more flexibly than existing Procedural Programming method, and the process of calculating the distflow and the loss of configurated system is shown. In addition, this paper suggests more efficient method compared by the results of reconfiguration on the purpose of the loss minimization and by the result of distribution power system reconfiguration on the purpose of load balancing. Moreover, it searches for the method to approach the global optimal solution more quickly.

Implementation of H.264/AVC Deblocking Filter on 1-D CGRA (1-D CGRA에서의 H.264/AVC 디블록킹 필터 구현)

  • Song, Sehyun;Kim, Kichul
    • Journal of IKEEE
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    • v.17 no.4
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    • pp.418-427
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    • 2013
  • In this paper, we propose a parallel deblocking filter algorithm for H.264/AVC video standard. The deblocking filter has different filter processes according to boundary strength (BS) and each filter process requires various conditional calculations. The order of filtering makes it difficult to parallelize deblocking filter calculations. The proposed deblocking filter algorithm is performed on PRAGRAM which is a 1-D coarse grained reconfigurable architecture (CGRA). Each filter calculation is accelerated using uni-directional pipelined architecture of PRAGRAM. The filter selection and the conditional calculations are efficiently performed using dynamic reconfiguration and conditional reconfiguration. The parallel deblocking filter algorithm uses 225 cycles to process a macroblock and it can process a full HD image at 150 MHz.

Analysis of the APS protocol for BSHR/2 networks (BSHR/2 네트워크를 위한 APS 프로토콜 분석)

  • 김성선;손희영;이상순
    • Journal of the Korea Society of Computer and Information
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    • v.6 no.2
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    • pp.108-115
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    • 2001
  • SDH-based SHR networks are the reconfiguration process in case of failure and APS protocol used. In this study, addresses the maximum allowed recovery time in two fiber bidirectional networks. We analyse the APS protocol and derive the Processing time domains of each n order to cope with the maximum reconfiguration time of 50㎳, as specified in the ITU-T standard. We finally analyze the interleaved failures. One is the signal degrade then the signal failure, the other is the signal failure then the signal failure. Any case analysis is carried out. reconfiguration time can be guaranteed.

A Fully-Integrated Penta-Band Tx Reconfigurable Power Amplifier with SOI CMOS Switches for Mobile Handset Applications

  • Kim, Unha;Kang, Sungyoon;Kim, Junghyun;Kwon, Youngwoo
    • ETRI Journal
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    • v.36 no.2
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    • pp.214-223
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    • 2014
  • A fully-integrated penta-band reconfigurable power amplifier (PA) is developed for handset Tx applications. The output structure of the proposed PA is composed of the fixed output matching network, power and frequency reconfigurable networks, and post-PA distribution switches. In this work, a new reconfiguration technique is proposed for a specific band requiring power and frequency reconfiguration simultaneously. The design parameters for the proposed reconfiguration are newly derived and applied to the PA. To reduce the module size, the switches of reconfigurable output networks and post-PA switches are integrated into a single IC using a $0.18{\mu}m$ silicon-on-insulator CMOS process, and a compact size of $5mm{\times}5mm$ is thus achieved. The fabricated W-CDMA PA module shows adjacent channel leakage ratios better than -39 dBc up to the rated linear power and power-added efficiencies of higher than around 38% at the maximum linear output power over all the bands. Efficiency degradation is limited to 2.5% to 3% compared to the single-band reference PA.

Utility Design for Graceful Degradation in Embedded Systems (우아한 성능감퇴를 위한 임베디드 시스템의 유용도 설계)

  • Kang, Min-Koo;Park, Kie-Jin
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.2
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    • pp.65-72
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    • 2007
  • As embedded system has strict cost and space constraints, it is impossible to apply conventional fault-tolerant techniques directly for increasing the dependability of embedded system. In this paper, we propose software fault-tolerant mechanism which requires only minimum redundancy of system component. We define an utility metric that reflects the dependability of each embedded system component, and then measure the defined utility of each reconfiguration combinations to provide fault tolerance. The proposed utility evaluation process shows exponential complexity. However we reduce the complexity by hierachical subgrouping at the software level of each component. When some components of embedded system are tailed, reconfiguration operation changes the system state from current faulty state to pre-calculated one which has maximum utility combination.

Trajectory Planning of Satellite Formation Flying using Nonlinear Programming and Collocation

  • Lim, Hyung-Chu;Bang, Hyo-Choong
    • Journal of Astronomy and Space Sciences
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    • v.25 no.4
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    • pp.361-374
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    • 2008
  • Recently, satellite formation flying has been a topic of significant research interest in aerospace society because it provides potential benefits compared to a large spacecraft. Some techniques have been proposed to design optimal formation trajectories minimizing fuel consumption in the process of formation configuration or reconfiguration. In this study, a method is introduced to build fuel-optimal trajectories minimizing a cost function that combines the total fuel consumption of all satellites and assignment of fuel consumption rate for each satellite. This approach is based on collocation and nonlinear programming to solve constraints for collision avoidance and the final configuration. New constraints of nonlinear equality or inequality are derived for final configuration, and nonlinear inequality constraints are established for collision avoidance. The final configuration constraints are that three or more satellites should form a projected circular orbit and make an equilateral polygon in the horizontal plane. Example scenarios, including these constraints and the cost function, are simulated by the method to generate optimal trajectories for the formation configuration and reconfiguration of multiple satellites.

Reconfiguration method for Supervisor Control in Deadlock status Using FSSTP(Forbidden Sequence of State Transition Problem) (순차상태전이금지(FSSTP)를 이용한 교착상태 관리제어를 위한 재구성 방법)

  • Song, Yu-Jin;Lee, Eun-Joo;Lee, Jong-Kun
    • Journal of Institute of Control, Robotics and Systems
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    • v.14 no.3
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    • pp.213-220
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    • 2008
  • The object of this paper is to propose a method to deal with the problem of modeling user specifications in approaches based on supervisory control and Petri nets. However, most of Petri Net approaches are based on forbidden states specifications, and these specifications are suitable the use of tool such as the reachability graph. But these methods were not able to show the user specification easily and these formalisms are generally limited by the combinatorial explosion that occurs when attempting to model complex systems. Herein, we propose a new efficient method using FSSTP (Forbidden Sequences of State-Transitions Problem) and theory of region. Also, to detect and avoid the deadlock problem in control process, we use DAPN method (Deadlock Avoidance Petri nets) for solving this problem in control model.