• 제목/요약/키워드: Printed Circuit Board

검색결과 630건 처리시간 0.029초

인쇄뢰로기판의 누화해석 (Crosstalk Analysis on Printed Circuit Board)

  • 박경희;김제영;김수중
    • 전자공학회논문지A
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    • 제28A권9호
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    • pp.700-707
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    • 1991
  • Transmission line crosstalk of a printed circuit baord terminated with the linear resistive and nonlinear terminal network is analyzed. Based on a quasi-static approximation, crosstalk voltage is computed in frequency domain by applying the modal analysis. A scheme to calculate the maximum crosstalk voltage for a line terminated with the nonlinear digital gate is proposed. And also, crosstalk quantities are numerically obtained for the microstrip and strip line, and compared with the experimental data to validate relevance of this method.

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PCB 산업의 환경변화와 기술적 대응 (Environmental Changes & Technical Responses in Printed Circuit Board Industry)

  • 이진호
    • 마이크로전자및패키징학회지
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    • 제6권4호
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    • pp.73-77
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    • 1999
  • Revolutionary changes on multimedia, network and PDA(Personal digital assistants) causes PCB(Printed circuit beard) manufacturers to change their attitudes to product. Traditional idea for current market such as price, market, and service has collapsed down and new digitalization urges PCB manufacturers to deal with new technologies, shorter lead time with reasonable price, high qualities. Therefore PCB manufacturers have an effort to develop new marketing, products, processes for low cost to keep up pace with assembly makers.

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코로나 방전 정전선별기 내 PCB 입자의 이동궤도 시뮬레이션 (Simulation on the PCB Particle Trajectories in Corona-discharge Electrostatic Separator)

  • 한성수;박승수;김성민;박재구
    • 자원리싸이클링
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    • 제23권6호
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    • pp.30-39
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    • 2014
  • 코로나 방전 정전선별기 내에서 인쇄회로기판(Printed Circuit Board, PCB) 분쇄 입자의 이동궤도를 전산 모사하였다. 여기서 PCB입자는 전자부품 분리된 기판을 파쇄한 것으로, 대부분 구리와 FR-4(Flame Retardant Level-4)로 이루어져있다. 우선 입자가 선별기내 회전전극으로부터 탈착 지점을 계산하였으며, 중력, 원심력, 정전기력의 평형으로부터 유도되었다. 한편 탈착 후 이동궤도는 입자의 운동방정식으로부터 구한 가속도를 시간 적분하여 계산하였다. 시뮬레이션 변수는 입자의 크기, 공급전압의 세기, 회전전극속도 및 유도전극 각도로 하였다. 입자 이동궤도에 미치는 영향은 구리 입자의 경우에는 회전속도가 주요 변수였으나, 반면 FR-4 입자의 경우에는 상기 모든 변수에 영향을 받는 것으로 나타났다.

잉크젯 인쇄 기술을 이용한 인쇄회로기판용 나노구리배선 개발 (Cu Line Fabricated with Inkjet Printing Technology for Printed Circuit Board)

  • 서상훈;이로운;윤관수;정재우;이희조;육종관
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2008년도 추계학술대회A
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    • pp.1806-1809
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    • 2008
  • Study that form micro pattern by direct ink jet printing method is getting attention recently. Direct ink jet printing spout fine droplet including nano metal particle by force or air pressure. There is reason which ink jet printing method is profitable especially in a various micro-patterning technology. It can embody patterns directly without complex process such as mask manufacture or screen-printing for existent lithography. In this study, research of a technology that ejects fine droplet form of Pico liter and forms metal micro pattern was carried with inkjet head of piezoelectricity drive system. Droplet established pattern while ejecting consecutively and move on the surface at the fixed speed. Patterns formed in ink are mixed with organic solvent and polymer that act as binder. So added thermal hardening process after evaporate organic solvent at isothermal after printing. I executed high frequency special quality estimation of CPW transmission line to confirm electrical property of manufactured circuit board. We tried a large area printing to confirm application possibility of an ink jet technology.

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Global Navigation Satellite Service 를 위한 EBG 구조체 제작 (Fabrication of the EBG structure for GNSS)

  • 장영진;정기현;조승일;여성대;김종운;김성권
    • 한국위성정보통신학회논문지
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    • 제9권4호
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    • pp.42-46
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    • 2014
  • 본 논문에서는 1.55GHz에서 1.81GHz 대역을 사용하는 GNSS(Global-Navigation Satellite Service)시스템에, 단말기의 전원안정화를 위해서 PCB(Printed Circuit Board) 내층에 삽입될 코일 구조의 EBG(Electromagnetic Band Gap) 구조체를 제안 및 제작한다. 제작한 EBG 구조체의 테스트 결과, 사용 주파수 대역에서 삽입손실(S21)이 약 -50dB 이하로 측정되었다. 본 연구결과는 향후, PCB 회로 설계의 PDN(Power Delivery Network)구조의 안정화 향상 및 EMI(Electro Magnetic Interference) 대책에 효과적일 것으로 기대된다.

Sn-3.0Ag-0.5Cu, Sn-37Pb 표면처리 기판의 전기화학적 이온 마이그레이션 민감도 (Electrochemical Ion Migration Sensitivity of Printed Circuit Board Plated with Sn-3.0Ag-0.5Cu and Sn-37Pb)

  • 홍원식;박노창;오철민;김광배
    • 대한용접접합학회:학술대회논문집
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    • 대한용접접합학회 2006년 추계학술발표대회 개요집
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    • pp.136-138
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    • 2006
  • Recently a lots of problems have observed in high densified and high integrated electronic components. One of them is ion migration phenomena, which induce the electrical short of electrical circuit. Ion migration phenomena has been observed in the field of exposing the specific environment and using for a long time. Also as the RoHS restriction was started in July 1st, 2006, Pb-free solder was utilized in electronics assemblies. In this case, it is very important to compatible between components and printed circuit board(PCB), thus surface treatment materials of PCB was changed to Sn, Sn-3.0Ag-0.5Cu, Cu. Therefore these new application become to need to reevaluate the sensitivity about electrochemical ion migration. This study was evaluated the occurrence time of electrochemical ion migration using by water drop test. We utilized PCB(printed circuit board) having a comb pattern as follows 0.1, 0.318, 0.5, 1.0 mm pattern distance. Sn-3.0Ag-0.5Cu and Sn-37Pb were electroplated on the comb pattern. 6.5V and 15.0V were applied in the comb pattern and then we measured the electrical short time causing by occurring the ion migration. In these results, we evaluate the sensitivity and derived the prediction models of ion migration occurrence time depending on the pattern materials, applied voltage and pattern spacing of PCB conductor.

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전자장비 안전설계를 위한 PCB의 설계단계별 열전달 해석 (Numerical Analysis of Heat Transfer of a Printed Circuit Boards for Safety Design of Electronic Equipment at Each Design Stage)

  • 김재홍;김종일
    • 한국안전학회지
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    • 제13권2호
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    • pp.22-29
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    • 1998
  • The natural convection cooling of simulated electronic chips located on a printed circuit board(PCB) has been studied by Computer Aided Engineering(CAE). In CAE, 3-dimensional finite element model of simulated electronic chip was made to accomplish heat transfer analysis at each design stage of a printed circuit boards for thermal optimization. The simulated electronic chips are installed protrudent from the plate about 3mm. The materials the plates are epoxy and aluminum. The results show that the chip with relatively high heat generation rates should not be close to each other. It is found, as well that cooling effect for the aluminum plate is superior to the epoxy plate and location of maximum temperature is significantly influenced by the structure variation of PCB. In developing PCB and electronic chips, it's recommended that CAE is very useful to estimate to the distribution of temperature.

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Process Optimization for Flexible Printed Circuit Board Assembly Manufacturing

  • Hong, Sang-Jeen;Kim, Hee-Yeon;Han, Seung-Soo
    • Transactions on Electrical and Electronic Materials
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    • 제13권3호
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    • pp.129-135
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    • 2012
  • A number of surface mount technology (SMT) process variables including land design are considered for minimizing tombstone defect in flexible printed circuit assembly in high volume manufacturing. As SMT chip components have been reduced over the past years with their weights in milligrams, the torque that once helped self-centering of chips, gears to tombstone defects. In this paper, we have investigated the correlation of the assembly process variables with respect to the tombstone defect by employing statistically designed experiment. After the statistical analysis is performed, we have setup hypotheses for the root causes of tombstone defect and derived main effects and interactions of the process parameters affecting the hypothesis. Based on the designed experiments, statistical analysis was performed to investigate significant process variable for the purpose of process control in flexible printed circuit manufacturing area. Finally, we provide beneficial suggestions for find-pitch PCB design, screen printing process, chip-mounting process, and reflow process to minimize the tombstone defects.

초소형 전자기 유도방식 에너지 하베스터용 연성 박막 다적층 평판 코일 설계 및 제작 (Design and Fabrication of Flexible Thin Multilayered Planar Coil for Micro Electromagnetic Induction Energy Harvester)

  • 박현철
    • 한국정밀공학회지
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    • 제33권7호
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    • pp.601-606
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    • 2016
  • In this paper, an energy harvester is developed that has advantages regarding piezoelectric noise minimization, mass production, and an easily available environmental energy source, electromagnetic induction, as well as low-frequency bandwidth and high amplitude. A process for fabricating a three-dimensional multilayered planar coil using micro-electro-mechanical systems (MEMS) on a flexible printed circuit board FPCB is introduced. Optimal shape and size were calculated via internal resistance and inductance, and a prototype was fabricated through the MEMS procedure while considering the possibility of mass production. Although the internal resistance matched the designed value, the electromotive force generated did not reach the intended amount. The main reason for the decrease in efficiency was the low area of coil outskirt exposed to the magnetic field while there was relative motion between the magnet and the coil.

Fe-Ni 합금 클래드 리드 프레임을 이용한 전자 재료 접합부의 품질향상과 그 신뢰성 (Quality improvement on joints of electronic materials and its reliability by Fe-Ni alloy clad lead frame)

  • 신영의;최인수;안승호
    • Journal of Welding and Joining
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    • 제13권2호
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    • pp.82-95
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    • 1995
  • This paper discusses distribution of thermal stress, strain at near the joint and investigates the reliability of solder joints of electronic devices on a printed circuit board. As Electronic devices are composed of different materials, thermal stresses generate at near the interface, such as solder joints and interface between lC device and lead frame pad due to the differences of thermal expansion coefficients, As results of thermal stress, strain, micro crack often occurs thermal fatigue fracture at the interface of different materials, The initiation and propagation of micro crack depend on the environmental conditions, such as storage temperature and thermal cycling. Finally, this paper experimentally shows a way to suppress micro cracks by using Fe-Ni alloy clad lead frame, and investigates crack and thermal fatigue fracture of TSOP(Thin small outline package) type on printed circuit board.

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