• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.8 no.3
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• pp.83-90
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• 2009

This paper presents the design and measurement of a flight model for a Ku-Band Linearized Channel Amplifier. All MMICs, Variable Gain Amplifier (VGA), Variable Voltage Attenuator ('.IVA), Branch line Coupler and Detector for Pre-distorter are fabricated using a Thin-Film Hybrid process. The performance of the fabricated module is verified through the radio frequency circuit simulation tool and electrical function test in space environment.

• Journal of Satellite, Information and Communications
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• v.3 no.2
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• pp.18-25
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• 2008

A major drawback of Orthogonal Frequency Division Multiplexing (OFDM) system is high peak-to-average power ratio (PAPR) of the transmitted signal which introduces inevitable non-linear distortion in the transmission due to the amplifier non-linear property. This causes both in-band distortion and out of band spectrum re-growth. A polynomial based pre-distortion is estimated using the non-linear and inverse non-linear polynomial achieved through the Least Square Error (LSE) method. A new technique of PAPR reduction called 'Phase Realignment' (PR) is proposed which has a optimal effect in improving the BER performance as well as considerable reduction in the PAPR. In this paper we used the PR method along with the 'Peak Clipping' (PC) method is used before the pre-distortion to remove the high peak present in the non constant amplitude of the OFDM signal responsible to drive the amplifier in near saturation region for better performance of the system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1034-1046
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• 2011

In this paper, a design and fabrication of 40 W power amplifier for the X-band using load-pull measurement of GaN HEMT chip are presented. The adopted active device for power amplifier is GaN HEMT chip of TriQuint company, which is recently released. Pre-matched fixtures are designed in test jig, because the impedance range of load-pull tuner is limited at measuring frequency. Essentially required 2-port S-parameters of the fixtures for extraction optimal input and output impedances is obtained by the presented newly method. The method is verified in comparison of the extracted optimal impedances with data sheet. The impedance matching circuit for power amplifier is designed based on EM co-simulation using the optimal impedances. The fabricated power amplifier with 15${\times}$17.8 $mm^2$ shows the efficiency above 35 %, the power gain of 8.7~8.3 dB and the output power of 46.7~46.3 dBm at 9~9.5 GHz with pulsed-driving width of 10 usec and duty of 10 %.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.160-163
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• 2009

HPA is one of the most essential device in wireless communication systems. However, because of nonlinear characteristic of HPA transmit signal is distorted with both amplitude and phase, this distortion leads to deepening adjacent channel interference. So a technique to change the nonlinear characteristic with linear characteristic is needed. In this paper, Among all techniques, we adopts a polynomial pre-distortion technique. Pre-distorted signal by pre-distorter has opposite characteristic with HPA. In result, the signal passed through pre-distorter and HPA has linear characteristic. But the accuracy of opposite characteristic of HPA is decreased at near portion of saturation point. So we improve the accuracy of opposite characteristic of HPA by using PAPR reduction method. In this paper, an adaptive polynomial pre-distortion technique is introduced to counterbalance the nonlinear characteristic of the transmit power amplifier, and a PAPR reduction method is introduced to increase efficiency of polynomial pre-distorter.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.5
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• pp.1193-1200
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• 2008

This paper describes a developed 5Watt power amplifier module fer mobile communication system using Gallium Nitride (GaN) devices. Three amplification stages such as pre-amplifier, driver amplifier, and power amplifier have been fabricated and measured separately in advance for incorporating the total power amplifier module and estimating the performances. In addition, a defected ground structure is combined with the output stage of the power amplifier module for improving harmonic rejection and adjacent channel power (ACP) characteristics. The measured performances of the GaN power amplifier module include 58dB,min of gain, 37dBm,min of output power, 50dBc,min of harmonic rejection, 35dBc,min of IMD3 for 2-tone input, and 35dBc,min of ACP at 2.1GHz frequency band.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.211-214
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• 1998

The high power amplifier (HPA) for broadcasting transmitter systems has nonlinear property in terms of input signal power. Hence, it produces AM/AM and AM/PM modulation to the modulated signal. Therefore, the non-linearity results in bandwidth expansion and nonlinear distortion to in-band signal. In this paper, we propose a simple sain-based predistorter that requires less computational burden and less time for the full initialization of the pre-distorter ROM table.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.12
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• pp.1159-1164
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• 2016

This study describes the design and implementation of SHF band Low Noise Amplifier of Digital Satellite Communication. We have applied to HEMT part to minimize Noise Figure of system. and minimized the potential for the occurrence of such erroneous operation of equipment through the simulations of the space environment. We designed a reliable Low Noise Amplifier through simulation for a TID according to the vibration generated during the launch and space radiation environment, and compared pre-simulation of main performance results to test results about main performances of Low Noise Amplifier after production.

• Journal of Sensor Science and Technology
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• v.10 no.4
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• pp.239-249
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• 2001

LAPS is a device which is dependent on the bias potential between a pH sensitivity and alternating photocurrent. We implemented the multichannel LAPS device and the detection system which was able to effectively measure the sensor's output by a synchronized detection circuit and multiple methods. The implemented LAPS was structured the multiple sensing sites for analyzing a various components simultaneously. And the system included a time-division method using one pre-amplifier being able to detect the multichannel pH concentration preserving a high S/N ratio and a control part. System hardware consists of a pre-amplifier, digital unit and sensor unit, and software consists of a system program and PC program. As results, we verified the successful operations of system including an implemented pre-amplifier and signal processing units.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.4
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• pp.45-53
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• 1999

A pre amplifier, a limiting amplifier, and a decision IC chipset for 10Gbit/s optical receiver was implemented with AIGaAs/GaAs HBT(Heterojunction Bipolar Transistor) technology. The HBT allows a cutoff frequency of 55GHz and a maximum oscillation of 45GHz. An optical receiver front-end was implemented with the fabricated pre amplifier IC and a PIN photodiode. It showed 46dB$\Omega$, gain and $f_{3db}$ of 12.3GHz. The limiting amplifier Ie showed 27dB small signal gain, $f_{3db}$ of 1O.6GHz, and the output is limited to 900mVp-p from 20mVp-p input voltage. The decision circuit IC showed 300-degree phase margin and input voltage sensitivity of 47mVp-p at 1OGbit/s.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.10
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• pp.31-39
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• 2009

This paper presents the single supply power line communication(PLC) SoC ASIC with built-in analog frond-end circuit. To achieve the low power consumption along with low chip cost, this PLC SoC ASIC employs fully CMOS analog front-end(AFE) and several built-in Regulators(LDOs) powering for Core logic, ADC, DAC and IP Pad driver. The AFE includes RX of pre-amplifier, Programmable gain amplifier and 10 bit ADC and TX of 10bit Digital Analog Converter and Line driver. This PLC Soc was implemented with 0.18um 1 Poly 5 Metal CMOS process. The single power supply of 3.3V is required for the internal LDOs. The total power consumption is below 30mA at standby and 300mA at active which meets the eco-design requirement. The chips size is $3.686\;{\times}\;2.633\;mm^2$.