• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.1
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• pp.86-93
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• 2003

This paper describes that the resonant tank type DC-DC converter consist of reactor and capacitor resonant tank circuit for increased the output current. This circuit configuration is composed of the resonant tank circuit used resonant capacitor and reactor and the capacitor connected in switch are a common using by resonance capacitor and ZVS(Zero Voltage Switching) capacitor. Therefore, the proposed converter can reduce a switching losses, noise, and voltage stress at turn-on and turn-on and has an advantage which is able to operating safely in load short, because DC reactor is connected with resonance reactor in order to supply a fixed current with low ripple from DC power supply. The analysis of proposed circuit uses normalized parameters and characteristic estimation is generally described the proposed circuit with the characteristics of power and output voltage etc. Also, design is based on the characteristic estmations in each step. Hence, We conform a rightfulness theoretical analysis by comparing a theoretical values and experimental values obtained from experiment.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.6
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• pp.1081-1086
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• 2008

This paper presents the $3^{rd}$ 4bit sigma delta modulator with the block and timing diagrams of DWA(Data Weighted Averaging) to optimize a operating time. In the modulator, the proposed DWA structure has a stable operation and timing margin so as to remove three latches and another clock. Because the modulator with proposed DWA structure improve timing margin about 23%. It can increase sampling frequency up to 244MHz. Through the MATLAB modeling, the optimized coefficients are obtained to design the modulator. The fully differential SC integrators, DAC, switch, quantizer, and DWA are designed by considering the nonideal characteristics. The designed $3^{rd}$ order 4bit modulator has a power consumption of 40mW and SNR(signal to noise ratio) of 77.2dB under 1.2V supply and 64MHz sampling frequency.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.504-508
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• 2004

An EMC analysis of a switched mode power supply (SMPS) have been usually using unbalance circuit topologies and the major factor of disturbance is parasitic capacitance. We have proposed a balanced switching converter circuit, which is an effective way to reduce the common mode conducted noise. In this paper presents the relationship between common mode current and radiated field.

• 유체기계공업학회:학술대회논문집
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• 2002.12a
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• pp.89-94
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• 2002

n general, the function of intake structure, whether it be a open channel, a fully wetted tunnel, a sump or a tank, is to supply an evenly distributed flow to a pump station. An even distribution of flow, characterized by strong local flow, can result in formation of surface or submerged vortices, and with certain low values of submergence, may introduce air into pump, causing a reduction of capacity and efficiency, an increase in vibration and additional noise. Uneven flow distribution can also increase or decrease the power consumption with a change in total developed head. To avoid these sump problems pump station designers are considered intake structure dimensions, such as approaching upstream, baffle size, sump width, width of pump cell and so on. From this background, flow characteristics of intake within sump are investigated numerically to obtain the optimal sump design data. The sump model is designed in accordance with HI code.

• Journal of electromagnetic engineering and science
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• v.8 no.3
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• pp.134-137
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• 2008

This paper proposes a novel quadrature VCO(QVCO) based on direct back-gate second harmonic coupling. The QVCO directly couples the current sources of the conventional LC VCOs through the back-gate instead of front-gate to generate quadrature signals. By the second harmonic injection locking, the two LC VCOs can generate quadrature signals without using on-chip transformer, or stability problem that is inherent in the direct front-gate second harmonic coupling. The proposed QVCO is implemented in $0.18{\mu}m$ CMOS technology operating at 2 GHz with 5.0 mA core current consumption from 1.8 V power supply. The measured phase noise of the proposed QVCO is - 63 dBc/Hz at 10 kHz offset, -95 dBc/Hz at 100 kHz offset, and -116 dBc/Hz at 1 MHz offset from the 2 GHz output frequency, respectively. The calculated figure of merit(FOM) is about -174 dBc/Hz at 1 MHz offset. The measured image band rejection is 46 dB which corresponds to the phase error of $0.6^{\circ}$.

• Journal of the Korean Society for Precision Engineering
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• v.22 no.3 s.168
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• pp.123-129
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• 2005

The unbalance of the power output, noise, and vibration is happened by the disproportionate pressure variation in the cylinder. For this reason, decrease of the pressure in the cylinder and increase of the residual gas effect on the engine performance. If the abnormal combustion is continued, the crack would be occurred in the engine block. And it could be broken down. For the normal combustion of the SI engine, it is important to supply the balanced mixture by each operating condition. In this study, it was tested the combustion characteristics in the cylinder according to the abnormal adjusting of intake & exhaust valve. This test is willing to set a basic data's analysis fur developing an automotive diagnosis system by analyzing the pressure in the cylinder, the output signal of MAP sensor, the exhaust gas, etc.

• Proceedings of the Korean Geotechical Society Conference
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• 2010.09a
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• pp.1289-1293
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• 2010

A slipring or FORJ are usually adopted in order for power supply of Geo-centrifuge and input/output data acquisition. Since using slipring causes quite a lot electrical noise, an optical communication using FORJ becomes more general for data acquisition. Such data acquisition devices, however, require frequent maintenance and replacement due to deterioration by long term usage. DICT has set up a real-time wireless date acquisition system using wireless communication technology instead of FORJ. The system enables a remote measurement at any inertial acceleration field up to 100g level and provides as same performance as FORJ. The priority of this system is to use a normal modem substituting a special FORJ.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.1108-1113
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• 1992

In this paper, the high frequency twin resonant inverter using MOSFET is presented. The output control is excellent and the EMI noise is reduced, because the output appear as the vector sum of current in each unit inverter. The output voltage and the output current of the inverter are controlled by PLL. In this paper, the principle of the twin resonant method is described. And computer simulations and experimental results are shown.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.246-251
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• 2014

In this paper, a high-speed CMOS Image Sensor (CIS) based on a 10-bit two step Single Slope A/D Converter (SS-ADC) is proposed. The A/D converter is composed of both 5-bit coarse ADC and a 6-bit fine ADC, and the conversion speed is 10 times faster than that of the single-slope A/D convertor. In order to reduce the pixel noise, further, a Hybrid Correlated Double Sampling (H-CDS) is also discussed. The proposed A/D converter has been fabricated with 0.13um 1-poly 4-metal CIS process, and it has a QVGA ($320{\times}240$) resolution. The fabricated chip size is $5mm{\times}3mm$, and the power consumption is about 35 mW at 3.3 V supply voltage. The measured conversion speed is 10 us, and the frame rate is 220 frames/s.

• Proceedings of the KIEE Conference
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• 1989.11a
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• pp.258-263
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• 1989

The configuration of Brushless DC moter is similar to the permanent magnet Synchronous moter. Power transistors are oftenly used to supply the switching by feedback signals of rotor positioning sensors. Brushless DC moter have been used in Aerospace and Robotics where the electromagnetic noise or the sparking of the commutator contact can not be tolerated and long - lived maintenance - free operation is required. This paper describes the design of the microprocessor - based controller for the Brushless DC moter. The controller is designed to operate for the constant torque generation and variable speed control using sinusoidal PWM inverters and resolvers as rotor positioning sensors.