• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.430-430
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• 2008

Using multi plasma enhanced chemical vapor deposition system (Multi-PECVD), p-a-Si:H deposition layer as a $p^+$ region which was annealed by laser (Q-switched fiber laser, $\lambda$ = 1064 nm) on an n-type single crystalline Si (100) plane circle wafer was prepared as new doping method for single crystalline interdigitated back contact (IBC) solar cells. As lots of earlier studies implemented, most cases dealt with the excimer (excited dimer) laserannealing or crystallization of boron with the ultraviolet wavelength range and $10^{-9}$ sec pulse duration. In this study, the Q-switched fiber laser which has higher power, longer wavelength of infrared range ($\lambda$ = 1064 nm) and longer pulse duration of $10^{-8}$ sec than excimer laser was introduced for uniformly deposited p-a-Si:H layer to be annealed and to make sheet resistance expectable as an important process for IBC solar cell $p^+$ layer on a polished n-type Si circle wafer. A $525{\mu}m$ thick n-type Si semiconductor circle wafer of (100) plane which was dipped in a buffered hydrofluoric acid solution for 30 seconds was mounted on the Multi-PECVD system for p-a-Si:H deposition layer with the ratio of $SiH_4:H_2:B_2H_6$ = 30:120:30, at $200^{\circ}C$, 50 W power, 0.2 Torr pressure for 20 minutes. 15 mm $\times$ 15 mm size laser cut samples were annealed by fiber laser with different sets of power levels and frequencies. By comparing the results of lifetime measurement and sheet resistance relation, the laser condition set of 50 mm/s of mark speed, 160 kHz of period, 21 % of power level with continuous wave mode of scanner lens showed the features of small difference of lifetime and lowering sheet resistance than before the fiber laser treatment with not much surface damages. Diode level device was made to confirm these experimental results by measuring C-V, I-V characteristics. Uniform and expectable boron doped layer can play an important role to predict the efficiency during the fabricating process of IBC solar cells.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권1호
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• pp.91-105
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• 2016

Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green's functions (NEGF) solved self - consistently with Poisson's equations. It is revealed that hetero - material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of ${\Phi}_{M1}/{\Phi}_{M2}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.

• JSTS:Journal of Semiconductor Technology and Science
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• 제1권1호
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• pp.84-93
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• 2001

An electromagnetic micro x-y stage for probe-based data storage (PDS) has been fabricated. The x-y stage consists of a silicon body inside which planar copper coils are embedded, a glass substrate bonded to the silicon body, and eight permanent magnets. The dimensions of flexures and copper coils were determined to yield $100{\;}\mu\textrm{m}$ in x and y directions under 50 mA of supplied current and to have 440 Hz of natural frequency. For the application to PDS devices, electromagnetic stage should have flat top surface for the prevention of its interference with multi-probe array, and have coils with low resistance for low power consumption. In order to satisfy these design criteria, conducting planar copper coils have been electroplated within silicon trenches which have high aspect ratio ($5{\;}\mu\textrm{m}$in width and $30{\;}\mu\textrm{m}$in depth). Silicon flexures with a height of $250{\;}\mu\textrm{m}$ were fabricated by using inductively coupled plasma reactive ion etching (ICP-RIE). The characteristics of a fabricated electromagnetic stage were measured by using laser doppler vibrometer (LDV) and dynamic signal analyzer (DSA). The DC gain was $0.16{\;}\mu\textrm{m}/mA$ and the maximum displacement was $42{\;}\mu\textrm{m}$ at a current of 180 mA. The measured natural frequency of the lowest mode was 325 Hz. Compared with the designed values, the lower natural frequency and DC gain of the fabricated device are due to the reverse-tapered ICP-RIE process and the incomplete assembly of the upper-sided permanent magnets for LDV measurements.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권5호
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• pp.658-665
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• 2014

The neural stimulators have been employed to the visual prostheses system based on the functional electrical stimulation (FES). Due to the size limitation of the implantable device, the smaller area of the unit current driver pixel is highly desired for higher resolution current stimulation system. This paper presents a 16-channel compact current-mode neural stimulator IC with digital to analog converter (DAC) sharing scheme for artificial retinal prostheses. The individual pixel circuits in the stimulator IC share a single 6 bit DAC using the sample-and-hold scheme. The DAC sharing scheme enables the simultaneous stimulation on multiple active pixels with a single DAC while maintaining small size and low power. The layout size of the stimulator circuit with the DAC sharing scheme is reduced to be 51.98 %, compared to the conventional scheme. The stimulator IC is designed using standard $0.18{\mu}m$ 1P6M process. The chip size except the I/O cells is $437{\mu}m{\times}501{\mu}m$.

• Design & Manufacturing
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• 제7권1호
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• pp.55-59
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• 2013

A Light Emitting Diode(LED) is a semiconductor device which converts electricity into light. LEDs are widely used in a field of illumination, LCD(Liquid Crystal Display) backlight, mobile signals because they have several merits, such as low power consumption, long lifetime, high brightness, fast response, environment friendly. In general, LEDs production does die bonding and wire bonding on board, and do silicon and phosphor dispensing to protect LED chip and improve brightness. Then lens molding process is performed using mixed liquid silicon rubber(LSR) by resin and hardener. A mixture of resin and hardener affect the optical characteristics of the LED lens. In this paper, computational design of static mixer was performed for mixing of liquid silicon. To evaluate characteristic of mixing efficiency, finite element model of static mixer was generated, and fluidic analysis was performed according to length of mixing element. Finally, optimal condition of length of mixing element was applied to static mixer from result of fluidic analysis.

• 대한전자공학회논문지SD
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• 제47권4호
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• pp.20-25
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• 2010

평판형 rib 도파로의 설계 및 공정기술을 바탕으로 632.8 nm에서 동작하는 집적 마흐젠더 간섭계 센서(Mach-Zehnder interferometric sensor)를 제작하였다. 단일모드와 높은 감도의 두 가지 조건을 고려하여 실리카 계열($SiO_2-SiO_xN_y-SiO_2$) rib 도파로를 설계하였고 박막증착, 사진제판, RIE (Reactive Ion Etching)와 같은 반도체 공정들을 이용해 그 기하학적 구조를 구현하였다. 제작된 rib 도파로의 광출력을 cut-back방법으로 분석한 결과, 약 4.82 dB/cm의 전파손실을 측정하였다. 동시에 크롬 식각방지 층 공정을 도입하여 마흐젠더 간섭계 칩 위에 감지영역(sensing zone)을 형상화할 때 발생하는 코어 층 손상을 방지하였다. 제작된 마흐젠더 간섭계 센서를 이용한 증류수/에탄올 혼합물 굴절률 측정실험을 통해 약 $\pi$/($4.04{\times}10^{-3}$)의 소자 감도(sensitivity)를 최종 확인하였다.

• 센서학회지
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• 제4권2호
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• pp.7-13
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• 1995

MOSFET의 전장효과와 압전물질의 압전효과를 결합한 새로운 FET형 반도체압력소자(PSFET : pressure sensitive field effect transistor)를 제조하고 동작 특성을 조사하였다. PSFET의 압전박막은 RF 마그네트론 스퍼터링으로 ZnO박막을 약 $5000{\AA}$ 게이트 위에 성막하였다. ZnO 압전박막의 최적 c-축 배향분극 구조를 얻기 위한 막 제조조건은 기판온도가 $300^{\circ}C$, RF 전력이 140W, 작업 분위기압은 5mtorr였으며, 플라즈마가스는 아르곤이었다. 제조된 PSFET는 적용된 압력범위($1{\times}10^{5}\;Pa{\sim}4{\times}10^{5}\;Pa$)에서 비록 감도는 낮으나 비교적 안정한 동작특성을 나타내었다.

• 한국재료학회지
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• 제28권1호
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• pp.38-42
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• 2018

Continuous efforts are being made to improve the efficiency of Si solar cells, which is the prevailing technology at this time. As opposed to the standard front-lit solar cell design, the back-lit design suffers no shading loss because all the metal electrodes are placed on one side close to the pn junction, which is referred to as the front side, and the incoming light enters the denuded back side. In this study, a systematic comparison between the two designs was conducted by means of computer simulation. Medici, a two-dimensional semiconductor device simulation tool, was utilized for this purpose. The $0.6{\mu}m$ wavelength, the peak value for the AM-1.5 illumination, was chosen for the incident photons, and the minority-carrier recombination lifetime (${\tau}$), a key indicator of the Si substrate quality, was the main variable in the simulation on a p-type $150{\mu}m$ thick Si substrate. Qualitatively, minority-carrier recombination affected the short circuit current (Isc) but not the opencircuit voltage (Voc). The latter was most affected by series resistance associated with the electrode locations. Quantitatively, when ${\tau}{\leq}500{\mu}s$, the simulation yielded the solar cell power outputs of $20.7mW{\cdot}cm^{-2}$ and $18.6mW{\cdot}cm^{-2}$, respectively, for the front-lit and back-lit cells, a reasonable 10 % difference. However, when ${\tau}$ < $500{\mu}s$, the difference was 20 % or more, making the back-lit design less than competitive. We concluded that the back-lit design, despite its inherent benefits, is not suitable for a broad range of Si solar cells but may only be applicable in the high-end cells where float-zone (FZ) or magnetic Czochralski (MCZ) Si crystals of the highest quality are used as the substrate.

• 로봇학회논문지
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• 제8권1호
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• pp.29-36
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• 2013

This paper presents a sensitivity optimization of a MEMS (microelectromechanical systems) gyroscope for a magnet-gyro system. The magnet-gyro system, which is a guidance system for a AGV (automatic or automated guided vehicle), uses a magnet positioning system and a yaw gyroscope. The magnet positioning system measures magnetism of a cylindrical magnet embedded on the floor, and AGV is guided by the motion direction angle calculated with the measured magnetism. If the magnet positioning system does not measure the magnetism, the AGV is guided by using angular velocity measured with the gyroscope. The gyroscope used for the magnet-gyro system is usually MEMS type. Because the MEMS gyroscope is made from the process technology in semiconductor device fabrication, it has small size, low-power and low price. However, the MEMS gyroscope has drift phenomenon caused by noise and calculation error. Precision ADC (analog to digital converter) and accurate sensitivity are needed to minimize the drift phenomenon. Therefore, this paper proposes the method of the sensitivity optimization of the MEMS gyroscope using DEAS (dynamic encoding algorithm for searches). For experiment, we used the AGV mounted with a laser navigation system which is able to measure accurate position of the AGV and compared result by the sensitivity value calculated by the proposed method with result by the sensitivity in specification of the MEMS gyroscope. In experimental results, we verified that the sensitivity value through the proposed method can calculate more accurate motion direction angle of the AGV.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권4호
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• pp.427-435
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• 2014

Segmented-channel MOSFETs (SegFETs) can achieve both good performance and variation robustness through the use of $HfO_2$ (a high-k material) to create the shallow trench isolation (STI) region and the very shallow trench isolation (VSTI) region in them. SegFETs with both an HTI region and a VSTI region (i.e., the STI region is filled with $HfO_2$, and the VSTI region is filled with $SiO_2$) can meet the device specifications for high-performance (HP) applications, whereas SegFETs with both an STI region and a VHTI region (i.e., the VSTI region is filled with $HfO_2$, and the STI region is filled with $SiO_2$) are best suited to low-standby power applications. AC analysis shows that the total capacitance of the gate ($C_{gg}$) is strongly affected by the materials in the STI and VSTI regions because of the fringing electric-field effect. This implies that the highest $C_{gg}$ value can be obtained in an HTI/VHTI SegFET. Lastly, the three-dimensional TCAD simulation results with three different random variation sources [e.g., line-edge roughness (LER), random dopant fluctuation (RDF), and work-function variation (WFV)] show that there is no significant dependence on the materials used in the STI or VSTI regions, because of the predominance of the WFV.