• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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• pp.365-368
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• 2004

Charge compensation effects in multi-resurf structure make possible to obtain high breakdown volatage and low on-resistance in vertical MOSFET. In this paper, electrical characteristics of the vertical MOSFET with multi epitaxial layer is presented. Proposed device has n and p-pillar for obtaining the charge compensation effects and The doping concentration each pillar is varied from $5{\times}10^{14}\;to\;1{\times}10^{16}/cm^3$. The thickness of the proposed device also varied from $400{\mu}m\;to\;500{\mu}m$. Due to the charge compensation effects, 4500V of breakdown voltage can be obtained.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.6-7
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• 2008

Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The sense FET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 450V power MOSFET devices by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5\times10^{14}cm^{-3}$, size of $600{\mu}m^2$ with 4.5 $\Omega$, and off-state leakage current below 50 ${\mu}A$. We offer the layout of the proposed sense FET to process actually. The offerd design and optimization methods is meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.589-592
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• 2002

The CCM (Continuous Conduction Mode) boost topology is generally used in the PFC (Power Factor Correction) regulator of household air-conditioning systems. There are three kinds of power devices-bridge rectifier diodes, FRDs (Fast Recovery Diodes), and IGBTs (or MOSFETs) - used In a boost PFC regulator. Selecting the appropriate device is very cumbersome work, specially, in the case of FRDs and IGBTs, because there are several considerations as described below: 1) High frequency leakage current regulation (conducted and radiated EMI regulation) 2) Power losses and thermal design 3) Device cost. It should be noted that there are trade-offs between the power loss characteristic of 2) and the other characteristics of 1) and 3). This paper presents a detailed evaluation by using several types of power devices, which can be unintentionally used, to show that optimal selection can be achieved. Based on the given thermal resistances, thermal analysis and design procedures are also described from a practical viewpoint.

• Journal of Power Electronics
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• 제11권3호
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• pp.381-388
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• 2011

This article presents the development of a model for SiC power diodes based on the physics of the semiconductor. The model is able to simulate the behavior of the dynamics of the charges in the N- region based on the stored charge inside the SiC power diode, depending on the working regime of the device (turn-on, on-state, and turn-off). The optimal individual calculation of the ambipolar diffusion length for every phase of commutation allows for solving the ambipolar diffusion equation (ADE) using a very simple approach. By means of this methodology development a set of differential equations that models the main physical phenomena associated with the semiconductor power device are obtained. The model is developed in Pspice with acceptable simulation times and without convergence problems during its implementation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 C
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• pp.1977-1979
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• 2005

열저항 측정법에는 정상상태보다는 과도응답 특성을 이용하는 것이 우수한 것으로 20년부터 알려져 왔다. 온도를 시간의 함수로 나타내는 열적 계단응답함수를 이용하면 칩에서 주위 분위기, 냉각장치 또는 마운트를 포함한 열 임피던스를 측정할 수 있다. 소자 접합부의 열적 동특성을 측정함으로써 칩 주변의 기하학적 물질에 대한 특성을 파악할 수 있으며 나아가 측정으로부터 소자의 열적 구조를 유추할 수 있다. 본 논문에서는 열적 계단응답 특성을 이용한 열 임피던스 측정이론 및 원리에 대해서 개관하였다.

• Journal of Semiconductor Engineering
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• 제1권1호
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• pp.57-63
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• 2020

Complementary metal-oxide-semiconductor (CMOS) technology is now facing a power scaling limit to increase integration density. Since 1970s, multi-valued logic (MVL) has been considered as promising alternative to resolve power scaling challenge for increasing information density up to peta-scale level by reducing the system complexity. Over the past several decades, however, a power-scalable and mass-producible MVL technology has been absent so that MVL circuit and system implementation have been delayed. Recently, compact MVL device researches incorporating multiple-switching characteristics in a single device such as 2D heterojunction-based negative-differential resistance (NDR)/transconductance (NDT) devices and quantum-dot/superlattices-based constant intermediate current have been actively performed. Meanwhile, wafer-scale, energy-efficient and variation-tolerant ternary-CMOS (T-CMOS) technology has been demonstrated through commercial foundry. In this review paper, an overview for MVL development history including recent studies will be presented. Then, the status and its future research direction of MVL technology will be discussed focusing on the T-CMOS technology for peta-scale information processing in semiconductor chip.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권5호
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• pp.500-510
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• 2013

In this paper, a high-sensitivity low power photodetector using double gate (DG) MOSFET is proposed for the first time using change in subthreshold current under illumination as the sensitivity parameter. An analytical model for optically controlled double gate (DG) MOSFET under illumination is developed to demonstrate that it can be used as high sensitivity photodetector and simulation results are used to validate the analytical results. Sensitivity of the device is compared with conventional bulk MOSFET and results show that DG MOSFET has higher sensitivity over bulk MOSFET due to much lower dark current obtained in DG MOSFET because of its effective gate control. Impact of the silicon film thickness and gate stack engineering is also studied on sensitivity.

• 한국방사선학회논문지
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• 제6권6호
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• pp.495-498
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• 2012

논문에서는 전력용반도체 소자의 수명예측으로 기초적인 동작환경과 구동시간들을 기록하였다. 전력변환기의 제어기에 의하여 전력소자의 구동시간과 방렬기의 온도 등 동작환경을 누적하여 기록하고 이를 확인할 수 있도록 하므로써 전력용 반도체소자는 그 구조에서 수명은 반도체 칩의 온도변화의 크기와 반복회수로 사용기간을 보증하고 있으므로 이에 의한 수명의 예측으로 유지보수 또는 교체가 적절한 시점에서 이루어질 수 있다고 판단된다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권3호
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• pp.339-344
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• 2014

This paper presents a novel bipolar junction transistor (BJT) based electrostatic discharge (ESD) protection device. This protection device was designed for 20V power clamps and fabricated by a process with Bipolar-CMOS-DMOS (BCD) $0.18{\mu}m$. The current-voltage characteristics of this protection device was verified by the transmission line pulse (TLP) system and the DC BV characteristic was verified by using a semiconductor parameter analyzer. From the experimental results, the proposed device has a trigger voltage of 29.1V, holding voltage of 22.4V and low on-resistance of approximately $1.6{\Omega}$. In addition, the test of ESD robustness showed that the ESD successfully passed through human body model (HBM) 8kV. In this paper, the operational mechanism of this protection device was investigated by structural analysis of the proposed device. In addition, the proposed device were obtained as stack structures and verified.

• Journal of Electrical Engineering and Technology
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• 제9권2호
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• pp.686-694
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• 2014

A power semiconductor device, usually used as a switch or rectifier, is very significant in the modern power industry. The power semiconductor, in terms of its physical properties, requires a high breakdown voltage to turn off, a low on-state resistance to reduce static loss, and a fast switching speed to reduce dynamic loss. Among those parameters, the breakdown voltage and on-state resistance rely on the doping concentration of the drift region in the power semiconductor, this effect can be more important for a higher voltage device. Although the low doping concentration in the drift region increases the breakdown voltage, the on-state resistance that is increased along with it makes the static loss characteristic deteriorate. On the other hand, although the high doping concentration in the drift region reduces on-state resistance, the breakdown voltage is decreased, which limits the scope of its applications. This addresses the fact that breakdown voltage and on-state resistance are in a trade-off relationship with a parameter of the doping concentration in the drift region. Such a trade-off relationship is a hindrance to the development of power semiconductor devices that have idealistic characteristics. In this study, a novel structure is proposed for the Insulated Gate Bipolar Transistor (IGBT) device that uses conductivity modulation, which makes it possible to increase the breakdown voltage without changing the on-state resistance through use of a P-floating layer. More specifically in the proposed IGBT structure, a P-floating layer was inserted into the drift region, which results in an alleviation of the trade-off relationship between the on-state resistance and the breakdown voltage. The increase of breakdown voltage in the proposed IGBT structure has been analyzed both theoretically and through simulations, and it is verified through measurement of actual samples.