• Title/Summary/Keyword: Power factor Correction

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Active Power Factor Correction Technology of Electronic Ballast (안정기용 능동역율 제어기술)

  • Han, Soo-Bin;Park, Suck-In;Jeoung, Hak-Guen;Jung, Bong-Man;You, Seong-Won
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2006.05a
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    • pp.225-227
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    • 2006
  • Active power factor correction methods for electronic ballast are reviewed in this paper. PFC technology becomes more important due to various wattage ratings of new light sources. Expecially, most popular two method critical conduction mode and average mode, are described. Each characteristics are compared in relation to application target and power rating.

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Novel Control Range Compensation Method in Power Factor Correction Circuit

  • Park, Youngbae;Cho, Donghye
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.224-225
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    • 2012
  • When Power Factor Correction(PFC) boost converter is designed for the universal input range, unwanted burst operation can be found at high line and light load. This operation may cause an audible noise from the boost inductor or sensitive flicker for human eye can be found in case of the display application. In order to solve this difficulty, this paper proposes the new control range compensation method and shows the effectiveness than the conventional method thru the experimental result.

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Novel Crest Factor Improvement of Electronic Ballast-Fed Fluorescent Lamp Current Using Pulse Frequency Modulation

  • Song Joong-Ho;Choy Ick;Choi Ju-Yeop
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.98-103
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    • 2001
  • In case that electronic ballast employing a valley-fill passive power factor correction (PFC) circuit is used for feeding fluorescent lamps, a new method to reduce crest factor of the lamp current is studied in this paper. In order to reduce crest factor to lower value, a pulse frequency modulation technique based on the waveform of the dc-link voltage which is predetermined by the passive PFC circuit, is taken into the switching control action of the electronic ballast. An equation-based analysis between the crest factor of lamp current and the effect of varying the inverter switching frequency is comprehensively performed.

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Suitability Review for Power Correction Parameter of Induction Motor (유도전동기 역률 보상 파라미터의 적정성 검토)

  • Kim, Jong-Gyeum
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.12
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    • pp.101-109
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    • 2008
  • Induction motor needs reactive power to sustain the electromagnetic field required for rotating. If reactive power is provided by the load side instead of the source side, power factor will be increased. Power factor of induction motor is usually low and needs to be compensated with power capacitor. In domestic regulations, Capacitor capacity for the power factor correction of induction motor should be complied with the recommended value by the motor output. But, at the same output, characteristics of induction motor is different from each other by the rotation speed and is not suitable for application of regular capacitor value regardless of motor's characteristics. In this paper, we compared to each other with the existing value and new proposed value with rotation speed under the same output condition, confirmed that power capacitor capacity is needed to upgrade for the better power factor.

Performance Analysis of Single-phase SRM Drive System with Single-stage Power Factor Correction (1단구조방식의 PFC회로를 갖는 단상 SRM 구동시스템의 특성해석)

  • Lee, Dong-Hee;Lee, Jin-Kuk;An, Young-Ju;Ahn, Jin-Woo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.11 no.4
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    • pp.328-339
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    • 2006
  • In this paper the characteristic analysis of a single-phase switched reluctance motor (SRM) drive system with power factor correction (PFC) circuit is presented. The SRM is a low cost, simple and has a good high speed performance. The SRM drive with diode rectifier and filter capacitor has a low power factor because of short switch on time of capacitor. A novel switching topologic is presented to improve power factor and reduce torque ripple based on analysis of PFC circuit. Accordingly the SRM drive system with PFC circuit is also presented. Through the numerical analysis of the system, the toque ripple, power factor and efficiency with the change of rotary speed, load torque and capacity of the capacitor are achieved and compared with actual measured value.

Practical Design and Implementation of a Power Factor Correction Valley-Fill Flyback Converter with Reduced DC Link Capacitor Volume (저감된 DC Link Capacitor 부피를 가지는 역률 개선 Valley-Fill Flyback 컨버터의 설계 및 구현)

  • Kim, Se-Min;Kang, Kyung-Soo;Kong, Sung-Jae;Yoo, Hye-Mi;Roh, Chung-Wook
    • The Transactions of the Korean Institute of Power Electronics
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    • v.22 no.4
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    • pp.277-284
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    • 2017
  • For passive power factor correction, the valley fill circuit approach is attractive for low power applications because of low cost, high efficiency, and simple circuit design. However, to vouch for the product quality, two dc-link capacitors in the valley fill circuit should be selected to withstand the peak rectified ac input voltage. The common mode (CM) and differential mode (DM) choke should be used to suppress the electromagnetic interference (EMI) noise, thereby resulting in large size volume product. This paper presents the practical design and implementation of a valley fill flyback converter with reduced dc link capacitors and EMI magnetic volumes. By using the proposed over voltage protection circuit, dc-link capacitors in the valley fill circuit can be selected to withstand half the peak rectified ac input voltage, and the proposed CM/DM choke can be successfully adopted. The proposed circuit effectiveness is shown by simulation and experimentally verified by a 78W prototype.

A Novel PCCM Voltage-Fed Single-Stage Power Factor Correction Full-Bridge Battery Charger

  • Zhang, Taizhi;Lu, Zhipeng;Qian, Qinsong;Sun, Weifeng;Lu, Shengli
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.872-882
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    • 2016
  • A novel pseudo-continuous conduction mode (PCCM) voltage-fed single-stage power factor correction (PFC) full-bridge battery charger is proposed in this paper. By connecting a freewheeling transistor in parallel with an input inductor, the PFC cell can operate in the PCCM with a constant duty ratio. Thus, the dc/dc stage can be designed using this constant duty ratio and the restriction on the duty ratio of the PFC cell is eliminated. As a result, the input current distortion is less and the dc bus voltage becomes controllable over the wide output power range of the battery charger. Moreover, the operation principle of the dc/dc stage is designed to be similar to that of a conventional phase-shifted full-bridge converter. Therefore, it is easy to implement. In this paper, the operation of the new converter is explained, and the design considerations of the controller and key parameters are presented. Simulation and experimental results obtained from a 1 kW prototype are given to confirm the operation of the proposed converter.

Enhanced Variable On-time Control of Critical Conduction Mode Boost Power Factor Correction Converters

  • Kim, Jung-Won;Yi, Je-Hyun;Cho, Bo-Hyung
    • Journal of Power Electronics
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    • v.14 no.5
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    • pp.890-898
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    • 2014
  • Critical conduction mode boost power factor correction converters operating at the boundary of continuous conduction mode and discontinuous conduction mode have been widely used for power applications lower than 300W. This paper proposes an enhanced variable on-time control method for the critical conduction mode boost PFC converter to improve the total harmonic distortion characteristic. The inductor current, which varies according to the input voltage, is analyzed in detail and the optimal on-time is obtained to minimize the total harmonic distortion with a digital controller using a TMS320F28335. The switch on-time varies according to the input voltage based on the computed optimal on-time. The performance of the proposed control method is verified by a 100W PFC converter. It is shown that the optimized on-time reduces the total harmonic distortion about 52% (from 10.48% to 5.5%) at 220V when compared to the variable on-time control method.

Design of Power Factor Correction High Efficiency PWM Single-Phase Rectifier (역률보상 고효율 PWM 단상 정류기의 설계)

  • Choi, Seong-Hun;Kim, In-Dong;Nho, Eui-Cheol
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.3
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    • pp.540-548
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    • 2007
  • The parer proposes a power factor correction high efficiency PWM single-phase rectifier. Its good characteristics such as simple PWM control, low switch stress, and low VAR rating of commutation circuits make the proposed rectifier very suitable for various unidirectional power applications. In addition, the proposed rectifier consists of three boost-converter-type IGBT modules with the switching devices located at the bottom leg of the rectifier scheme, which also enables the use of the same power supply in both control and gate driver, thus resulting in simple control and power circuit structure. The detailed principle of operation and experimental results are also included. In particular, the design guide line is also suggested to make the circuit design of the proposed rectifier easy and fast.

Analysis of continuous conduction mode boost power-factor-correction circuit (부스트 방식 역률개선회로의 설계와 특성분석)

  • Kim, Cherl-Jin;Jang, Jun-Young;Kim, Sang-Duck;Song, Yo-Chang;Yoon, Shin-Yang
    • Proceedings of the KIEE Conference
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    • 2002.07b
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    • pp.1120-1122
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    • 2002
  • Switching power supply are widely used in many industrial field. Power factor improvement and harmonic reduction technique is very important in switching power supply. The power factor correction (PFC) circuit using boost converter used in input of power source is studied in this paper. It is analyzed distortional situations and harmonics of input currents that presented at continuous conduction mode(CCM) of boost PFC circuit. It is done simulations of harmonics distribution according to load variation by using PSPICE and MATLAB. From the actual experiment of boost PFC circuit the validity of the analysis is confirmed.

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