• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.7
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• pp.407-412
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• 2017

This paper introduces a biocompatible packaging system for implantable medical device having a hermetic sealing, such that a perfect physical and chemical isolation between electronic medical system and human body (including tissue, body fluids, etc.) is obtained. The hermetic packaging includes an electronic MEMS pressure sensor, power charging system, and bluetooth communication system to wirelessly measure variation of capacitance. The packaging was acquired by Quartz direct bonding and $CO_2$ laser welding, with a size of width $ 6cm{\times}length\;10cm{\times}lheight\;3cm$. Hermetic sealing of the packaged system was tested by changing the pressure in a hermetic chamber using a precision pressure controller, from atmospheric to 900 mmHg. We found that the packaged system retained the same count or capacitance values with sensor 1 - 25,500, sensor 2 - 26,000, and sensor 3 - 20,800, at atmospheric as well as 900 mmHg pressure for 5 hours. This result shows that the packaging method has perfect hermetic sealing in any environment of the human body pressure.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.4
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• pp.51-55
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• 2021

The nurses manually carry out the intravenous therapy for the patients. Using an Arduino, the fine flow controlling device was invented to provide an ongoing patient care. The medication is injected through a peristaltic pump, and the amount of the solution is controlled with a RGB color sensor. The power of the device is supplied through the batteries. An amount of the injection is measured with LIG strain sensor fabricated by 355nm UV pulsed laser. This system will provide a better medical service.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.3
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• pp.21-30
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• 2018

Driven by the recent energy saving trend, conventional silicon based power conversion modules are being replaced by modules using silicon carbide. Previous papers have focused mainly on the electrical advantages of silicon carbide semiconductors that can be used to design switching devices with much lower losses than conventional silicon based devices. However, no systematic study of their thermomechanical reliability in power conversion modules using finite element method (FEM) simulation has been presented. In this paper, silicon and silicon carbide based power devices with three-phase switching were designed and compared from the viewpoint of thermomechanical reliability. The switching loss of power conversion module was measured by the switching loss evaluation system and measured switching loss data was used for the thermal FEM simulation. Temperature and stress/strain distributions were analyzed. Finally, a thermal fatigue simulation was conducted to analyze the creep phenomenon of the joining materials. It was shown that at the working frequency of 20 kHz, the maximum temperature and stress of the power conversion module with SiC chips were reduced by 56% and 47%, respectively, compared with Si chips. In addition, the creep equivalent strain of joining material in SiC chip was reduced by 53% after thermal cycle, compared with the joining material in Si chip.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.1
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• pp.1-4
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• 2001

We have fabricated and evaluated a new Si pin photodetector for APF optical link. The fabricated device has the $p^{+}$-guard ring around the metal-semiconductor contact and the web patterned $p^{+}$-shallow diffused region in the light absorbing area. From the measurements of electo-optical characteristics under the bias of -5 V, the junction capacitance of 4 pF and the dark current of 180 pA were obtained. The optical signal current of 1.22 $\mu$A and the responsivity of 0.55 A/W were obtained when the 2.2 $\mu$W optical power with peak wavelength of 670 nm was incident on the device. The fabricated device showed the maximum spectral response in a spectrum of 650-700 nm. It is expected that the fabricated device can be very useful for detecting the optical signal in the application of red light optics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.30-30
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• 2007

현재 다양한 종류의 RF 통신 제품이 시장에 등장하면서 제품의 경쟁력 확보에 있어 소형화 정도가 중요한 이슈가 되고 있다. Passive Device는 RF Circuit을 제작할 때 많은 면적을 차지하고 있으며 이를 감소시키기 위해 여러 연구가 진행되고 있다. 가장 효과적인 방법으로 반도체 집적기술로 크기를 줄이는 방법이 있으나, 공정이 비싸고 제작 시간이 오래 걸려 제품개발 시간과 개발비용이 상승하게 된다. 반면에 SoP-L 공정은 PCB 제작에 이용되는 일반적인 재료와 공정을 사용하므로 개발 비용과 시간을 줄일 수 있다. SoP-L의 또 하나 장점은 다종 재료를 다층으로 구성할 수 있다는 점이다. 최근 chip-type의 Device를 PCB 기판 안에 내장하는 방법의 RF Circuit 소형화 연구가 많이 진행되고 있다. 본 연구에서는 SoP-L 공정으로 chip-type 수동소자를 PCB 기판 내에 함몰하여 수동소자회로를 구현, 분석하여 보았다. 수동소자회로는 880 MHz~960 MHz(GSM) 영역과 1.71 GHz~1.88 GHz(DCS) 영역을 나누는 Diplexer를 구성하였다. 1005 size의 chip 6개로 구현한 Diplexer를 표면실장과 함몰공정으로 제작하고 Network Analyzer로 측정하여 비교하였다. chip 표면실장으로 구현된 Diplexer는 GSM에서 최대 0.86 dB의 loss, DCS에서 최대 0.68 dB의 loss가 나타났다. 표면실장과 비교하였을 때 함몰공정의 Diplexer는 GSM 대역에서 약 0.5 dB의 추가 loss가 나타났으며 목표대역에서 0.6 GHz정도 내려갔다. 이 결과를 바탕으로 두 공정 간 차이점을 확인하고, 함몰공정으로 chip-type 수동소자를 사용하였을 때 고려해야 할 점을 분석하였다. 이를 바탕으로 SoP-L 함몰공정의 안정성을 높여서 이것을 이용한 회로의 소형화에 적용이 가능할 것으로 기대한다. 특히 능동소자의 DC Power Control에서 고용량의 수동소자를 이용할 때 집적도를 높일 수 있을 것이다.

• Journal of the Korean Society of Industry Convergence
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• v.24 no.6_2
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• pp.919-926
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• 2021

In this paper, a study was conducted on the miniaturization of an e-Mobility battery charger module using GaN-FET. GaN-FET is one of the types of WBG devices, and it is a device that exceeds the performance of existing Si power semiconductors. In particular, GaN-FET has the advantage of small packaging size and high switching frequency operation, which is advantageous for miniaturization of power converters. Therefore, a bidirectional DC/DC converter module for e-mobility charging using GaN-FET was developed. To apply to the converter to be developed, analysis is performed on the characteristics of GaN-FET, and after manufacturing a prototype of a bidirectional DC/DC converter module, the efficiency and temperature data of the power converter are analyzed to verify its feasibility.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.3 s.36
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• pp.243-251
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• 2005

The distribution of temperature of flip chipped device with peripheral solder bump array was measured with variables, such as the locations and geometries of heater, the size of device, the size of passivation opening. The highest temperature was measured with the larger device, $3.0(mm)\times3.0(mm)$, which has the smallest heater at the center of device and the circular passivation opening. For 2 (watts) power input, the device shows the highest temperature of about $110(^{\circ}C)$. In contrast, the smaller device, $1.5(mm)\times1.8(mm)$, shows that of $90(^{\circ}C)$. In addition to the size effect, the increase of passivation opening size decreased the maximum temperature by about $10(^{\circ}C)$. From the measurement, the temperature of device could be controlled with the size and geometry of heater, the size of device and the size and geometry of passivation opening.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.323-323
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• 2013

High power light-emitting diodes (LEDs) are widely used in many device applications due to its ability to operate at high power and produce high luminance. However, releasing the heat accumulated in the device during operating time is a serious problem that needs to be resolved to ensure high optical efficiency. Ceramic or Aluminium base metal printed circuit boards are generally used as integral parts of communication and power devices due to its outstanding thermal dissipation capabilities as heat sink or heat spreader. We investigated the characterisation of electroless plating of Ni-B film according to plating bath temperature, ranging from $50^{\circ}C$ to $75^{\circ}C$ on Ag paste/anodised Al ($Al_2O_3$)/Al substrate to be used in metal PCB for high power LED packing systems. X-ray diffraction (XRD), Field-Emission Scanning Electron Microscopy (FE-SEM) and X-ray Photoelectron Spectroscopy (XPS) were used in the film analysis. By XRD result, the structure of the as deposited Ni-B film was amorphous irrespective of bath temperature. The activation energy of electroless Ni-B plating was 59.78 kJ/mol at the temperature region of $50{\sim}75^{\circ}C$. In addition, the Ni-B film grew selectively on the patterned Ag paste surface.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.1-9
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• 2010

Three-dimensional (3-D) integration is an emerging technology, which vertically stacks and interconnects multiple materials, technologies, and functional components such as processor, memory, sensors, logic, analog, and power ICs into one stacked chip to form highly integrated micro-nano systems. Since CMOS device scaling has stalled, 3D integration technology allows extending Moore's law to ever high density, higher functionality, higher performance, and more diversed materials and devices to be integrated with lower cost. The potential benefits of 3D integration can vary depending on approach; increased multifunctionality, increased performance, increased data bandwidth, reduced power, small form factor, reduced packaging volume, increased yield and reliability, flexible heterogeneous integration, and reduced overall costs. It is expected that the semiconductor industry's paradiam will be shift to a new industry-fusing technology era that will offer tremendous global opportunities for expanded use of 3D based technologies in highly integrated systems. Anticipated applications start with memory, handheld devices, and high-performance computers and extend to high-density multifunctional heterogeneous integration of IT-NT-BT systems. This paper attempts to introduce new 3D integration technologies of the chip self-assembling stacking and 3D heterogeneous opto-electronics integration for realizng the super-chip.

• Journal of the Microelectronics and Packaging Society
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• v.22 no.2
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• pp.11-19
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• 2015

Since CMOS device scaling has stalled, three-dimensional (3-D) integration allows extending Moore's law to ever high density, higher functionality, higher performance, and more diversed materials and devices to be integrated with lower cost. 3-D integration has many benefits such as increased multi-functionality, increased performance, increased data bandwidth, reduced power, small form factor, reduced packaging volume, because it vertically stacks multiple materials, technologies, and functional components such as processor, memory, sensors, logic, analog, and power ICs into one stacked chip. Anticipated applications start with memory, handheld devices, and high-performance computers and especially extend to multifunctional convengence systems such as cloud networking for internet of things, exascale computing for big data server, electrical vehicle system for future automotive, radioactivity safety system, energy harvesting system and, wireless implantable medical system by flexible heterogeneous integrations involving CMOS, MEMS, sensors and photonic circuits. However, heterogeneous integration of different functional devices has many technical challenges owing to various types of size, thickness, and substrate of different functional devices, because they were fabricated by different technologies. This paper describes new 3-D heterogeneous integration technologies of chip self-assembling stacking and 3-D heterogeneous opto-electronics integration, backside TSV fabrication developed by Tohoku University for multifunctional convergence systems. The paper introduce a high speed sensing, highly parallel processing image sensor system comprising a 3-D stacked image sensor with extremely fast signal sensing and processing speed and a 3-D stacked microprocessor with a self-test and self-repair function for autonomous driving assist fabricated by 3-D heterogeneous integration technologies.