• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2005.05a
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• pp.106-110
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• 2005

In this paper, LED traffic signal lamp's operating circuit using Flyback converter and PFC IC has been presented. Most power conversion circuits use PFC IC for Power Factor Correction. The design parameter's value of Flyback converter has been proposed and the error amplifier which regulates the output voltage has been designed Besides, the under voltage protection circuit and the over voltage protection circuit for protecting the operating circuit kin unbalance of common electric power source and the temperature compensation circuit for fixed optical output power have been proposed.

• Journal of Power Electronics
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• v.15 no.4
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• pp.1018-1025
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• 2015

This paper proposes a methodological scheme for the photovoltaic (PV) simulator design. With the advantages of a digital controller system, linear interpolation is proposed for precise fitting with higher computational efficiency. A novel control strategy that directly tackles two different duty cycles is proposed and implemented to achieve a full-range operation including short circuit (SC) and open circuit (OC) conditions. Systematic design procedures for both hardware and algorithm are explained, and a prototype is built. Experimental results confirm an accurate steady state performance under different load conditions, including SC and OC. This low power apparatus can be adopted for PV education and research with a limited budget.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.9-12
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• 1998

In this paper, the power factor correction circuit using a parallel drive method is proposed so that the high power inverter air-conditioner with 3[ph] compressor motor may obtain the cost down and the improved performance. The adequate design procedures are presented to reduce the material costs by eliminating the power factor improving LC filter and derating output capacitor and inverter switches. Using the determined components, the prototype circuit with 6[kW] power consumption is built and tested to verify the operation of the proposed circuit.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.330-333
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• 2002

The design of high power electronic circuits and the verification of the design by practical experiments are time and cost consuming. Recently power circuit simulation technique is developing to do it easily. However, most of the simulation has used the ideal switch model consists of passive component that can not describe the physical characteristics of semiconductor devices and cannot describe the switching transient state. For the design of such power electronic circuits by the simulation, the switching transients are very important. Therefore the simulation models must describe the switching transient and the stationary behavior as precisely as possible on the hand and as fast as possible the other hand. This paper introduces the application of the physical models of power devices that are developed by TUM(Technical University of Munich, Germany) for the power electronic circuit analysis.

• Transactions on Electrical and Electronic Materials
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• v.1 no.3
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• pp.1-5
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• 2000

This paper presents a new sort of multilayer piezoelectric ceramic transformer for switching regulation power supplies. This piezoelectric transformer operate in the second thickness resonant vibration mode. Accordingly its resonant frequency is higher than 1 NHz, Because output power is low if input and output part of transformer are consisted of single layer, this research suggests a new method, which is consisted of both input and output part of transformer have 2-layered piezoelectric ceramics, The size of transformer is 20 mm in width and length, and 1.4 mm in thickness, respectively, To design a high efficient switching circuit of the transformer, internal circuit parameters were measured and then weve calculated a parameter of inductor nd capacitor to design a driving circuit, Weve used a MISFET and its driver circuit modified a calp oscillator circuit as the primary switching circuit.

• Journal of IKEEE
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• v.13 no.2
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• pp.248-252
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• 2009

In this paper, analysis of a noise factor and an effective power strategy for the OLED dc-dc converter are described. One of the main reasons that one may not design the OLED power for dc-dc converter is that OLED's panel noise is composed of FFN(Frame Frequency Noise) and LFN(Line Frequency Noise). Into the bargain, FFN is caused by both the dc-dc (circuit) and driving circuit. It is hard to get rid of FFN, baeause FFN has very little results value for our ears. LFN is adjusted by analog compensation value. Actually, that is more important problem than FFN. It is known that voltage divider for OLED's mode variation is not good for compact power design. In the end, a circuit design for understanding OLED's noise and a novel muti-channel dc-dc converter were presented.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.605-614
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• 2016

We develop a novel SAD circuit for power-efficient H.264 encoding, namely a-SAD. Here, some highest-order MSB's are approximated to single MSB. Our theoretical estimations show that our proposed design simultaneously improves performance and power of SAD circuit, achieving good power efficiency. We decide that the optimal number of approximated MSB's is four under 8-bit YUV-420 format, the largest number not to affect video quality and compression-rate in our video experiments. In logic simulations, our a-SAD circuit shows at least 9.3% smaller critical-path delay compared to existing SAD circuits. We compare power dissipation under iso-throughput scenario, where our a-SAD circuit obtains at least 11.6% power saving compared to other designs. We perform same simulations under two- and three-stage pipelined architecture. Here, our a-SAD circuit delivers significant performance (by 13%) and power (by 17% and 15.8% for two and three stages respectively) improvements.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.4
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• pp.490-494
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• 2014

In this paper, a design of high-speed power-off circuit and analysis. The incidence of high-dose transient radiation into the silicon-based semiconductor element induces the photocurrent due to the creation of electron-hole pairs, which causes the upset phenomenon of active elements or triggers the parasitic thyristor in the element, resulting in latch-up. High speed power-off circuit was designed to prevent burn-out of electronic device caused by Latch-up. The proposed high speed power-off circuit was configured with the darlington transistor and photocoupler so that the power was interrupted and recovered without the need for an additional circuit, in order to improve the existing problem of SCR off when using the thyristor. The discharge speed of the high speed power interruption circuit was measured to be 19 ${\mu}s$ with 10 ${\mu}F$ and 500 ${\Omega}$ load, which was 98% shorter than before (12.8 ms).

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.421-423
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• 2005

A bootstrap circuit for floating power supply has the advantage of being simple and inexpensive. However, the duty cycle and on-time are limited by the requirement to refresh the charge in the bootstrap capacitor. Hence, this paper deals with a design of charge pump circuit for a floating gate power supply of an IPM. The operation of the proposed circuit applied by three-phase inverter system for driving induction motor are verified through the experiments.

• Journal of information and communication convergence engineering
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• v.7 no.4
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• pp.453-458
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• 2009

This paper presents two methods of designing a Broadband Impedance Matching (BIM) circuit for maximizing a power line communication (PLC) equipment (or Modem) signal injection into its load at any power line connection port. This optimal (BIM) circuit design is achieved in two phases: Butterworth gain function and Tchebycheff gain function. According to the comparison of simulation and practical results, the performances of two gain functions on BIM are discussed.