• Title/Summary/Keyword: Power amplifiers

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Q-band MMIC Driver and Power Amplifiers for Wideband wireless Multimedia (Q-band 광대역 무선 멀티미디어용 MMIC구동 및 전력증폭기)

  • 강동민;이진희;윤형섭;심재엽;이경호
    • Proceedings of the IEEK Conference
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    • 2002.06a
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    • pp.167-170
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    • 2002
  • The design and fabrication of Q-band 3-stage monolithic microwave integrated circuit(MMIC) driver and power amplifiers for WLAN are presented using 0.2${\mu}{\textrm}{m}$ AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor(PHEMT). In each stage of the MMIC DA, a negative feedback is used for both broadband and good stability. The MMIC PA has employed a balanced configuration to overcome these difficulties and achieve high power with low VSWR over a wide frequency range. In the MMIC DA, the measurement results arc achieved as an input return loss under -4dB, an output return loss under -l0dB, a gain of 14dB, and a PldB of 17dB at C-band(36~ 44GHz). The chip size is 28mm$\times$1.3mm. The developed MMIC PA has the l0dB linear gain over 360Hz to 420Hz band and 22dBm PldB performance at 400Hz. The size of fabricated MMIC PA is 4mm x3mm. These results closely match with design results. This MMIC DA Sl PA will be used as the unit cells to develop millimeter-wave transmitters for use in wideband wireless LAN systems.

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5GHz, 0°/ 180° Active Phase Shifter Design for Millimeter-Wave Applications (밀리미터파 시스템 적용을 위한 5GHz, 0/180도 능동 위상변환기 설계)

  • Park, Chan-Gyu;Sin, Dong-Hwa;Lee, Dongho
    • Journal of Satellite, Information and Communications
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    • v.12 no.2
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    • pp.61-64
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    • 2017
  • A phase shifter is one of the key components that change the phase of an individual antenna in millimeter-wave phased array system. This paper presents a low-loss phase shifter design with two parallel 2-state amplifiers. To get the same gain of $0^{\circ}/180^{\circ}$ each state, delay lines are in the middle of each stage of the 2-Stage amplifiers. Normally, when adding AMPs in parallel, a power combiner/divider such as Wilkinson Power Combiner/Divider is added, but they are directly connected because it can cause added losses in silicon wafer. The measured data shows 12dB gain and 174-degree phase difference at 5GHz.

LTCC-based transformer design for output stage of differential RF power amplifiers (차동 전력증폭기 출력단용 LTCC 기반 RF 트랜스포머 설계)

  • Jewook Woo;Heesu Kim;Jooyoung Jeon
    • Journal of IKEEE
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    • v.27 no.1
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    • pp.53-58
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    • 2023
  • In this paper, a Radio Frequency (RF) transformer (TF) based on LTCC (Low Temperature Co-fired Ceramic) for the output stage of differential power amplifiers is presented. Instead of using an usual L-C matching circuit, a small-sized transformer was implemented on the LTCC board and the results were verified through simulation. For reduced size and better performance, a TF using more metal layers was implemented and compared with the existing TF through simulation. As a result of comparison, the proposed TF has an area reduced by 55% and a coupling coefficient increased by 25%, and insertion loss improvement of about 0.4dB at 5GHz was confirmed.

An Analysis of Wideband and High Efficiency Class-J Power Amplifier for Multiband RRH (다중대역 RRH를 위한 Class-J 전력증폭기의 광대역과 고효율 특성분석)

  • Choi, Sang-Il;Lee, Sang-Rok;Rhee, Young-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.3
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    • pp.276-282
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    • 2015
  • Until recently, power amplifiers using LDMOS were Class-AB and Doherty type, and showed 55 % efficiency for narrowband of 60 MHz bandwidth. However, owing to the RRH application of base stations power amplifier module, a bandwidth expansion of at least 100 MHz and high efficiency power amplifiers of at least 60 % power efficiency are required. In this study, a Class-J power amplifier was designed by optimizing an output matching circuit so that the second harmonic load will contain a pure reactance element only and have broadband characteristics by using GaN HEMT. The measurements showed that a 45 W Class-J power amplifier with a power added efficiency of 60~75 % was achieved when continuous wave signals were input at 1.6~2.3 GHz, including W-CDMA application.

A Study of the Fiber Fuse in Single-mode 2-kW-class High-power Fiber Amplifiers (단일 모드 2 kW급 고출력 광섬유 증폭기 내의 광섬유 용융 현상에 관한 연구)

  • Lee, Junsu;Lee, Kwang Hyun;Jeong, Hwanseong;Kim, Dong Jun;Lee, Jung Hwan;Jo, Minsik
    • Korean Journal of Optics and Photonics
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    • v.31 no.1
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    • pp.7-12
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    • 2020
  • In this paper, we experimentally investigate the fiber fuse in single-mode 2-kW-class high-power fiber amplifiers, depending on the cooling method at the splicing point. We measured the temperature of the splicing point between the pump-signal combiner and gain fiber as a function of laser output power. The temperature of the splicing point increased from 20 to 32℃ with a slope of 0.01℃/W, up to 1.2 kW of laser output power. At higher powers the temperature of the splicing point increased dramatically, with a slope of 0.08℃/W. After that, the fiber amplifier was destroyed during operation at 1.96 kW of output power by fiber fuse. The bullet shape, a common feature of fiber fuse, was observed in the damaged passive fiber core of the pump-signal combiner. Later, we adopted an improved water-cooled cold plate to increase the cooling efficiency at the splicing point, and investigated the laser output power. The temperature at the splicing point was 35.8℃ with a temperature-rise slope of 0.007℃/W at the maximum output power of 2.05 kW. The beam quality M2 was measured to be less than 1.3, and the output beam's profile was a stable Gaussian shape. Finally, neither fiber fuse nor mode instability was observed in the fiber amplifier at the maximum output power of 2.05 kW.

Design of a 12 bit current-mode folding/interpolation CMOS A/D converter (12비트 전류구동 폴딩.인터폴레이션 CMOS A/D 변환기 설계)

  • 김형훈;윤광섭
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.986-989
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    • 1999
  • An 12bit current-mode folding and interpolation analog to digital converter (ADC) with multiplied folding amplifiers is proposed in this paper. A current - mode multiplied folding amplifier is employed not only to reduced the number of reference current source, but also to decrease a power dissipation within the ADC. The designed ADC fabricated by a 0.6${\mu}{\textrm}{m}$ n-well CMOS double metal/single poly process. The simulation result shows the power dissipation of 280㎽ with a power supply of 5V.

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Design of a RF power amplifier using distributed network syntheses (분포정수 회로합성을 이용한 RF 전력 증폭기 설계)

  • Kim Nam-Tae;Lee Min-Soo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.7 no.4
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    • pp.602-607
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    • 2006
  • In this paper, the distributed network synthesis, which is useful to the design of wireless power amplifiers, is proposed, and a RF power amplifier is designed using the technique. The transfer function of distributed matching circuits is derived by Chebyshev approximation, and network element values for a specified topology are given as a function of minimum insertion losses and ripples. As an example, after a power transistor is modeled by load-pull data, the synthesis for distributed matching networks is applied to a power amplifier design, which has the electrical performance of 17dB gain and less IM3 than -43dBc at the 20W output power between 800 to 900MHz frequency range. Experimental results from a fabricated amplifier are shown to approach the design performance in the operating frequency range. The design of impedance matching networks by the transfer function synthesis is a useful method for the design of RF power amplifiers.

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An implementation of 60W X-band Cascade SSPA for Marine Radar System (선박 레이다용 60W X-band Cascade SSPA 구현)

  • Kim, Min-Soo;Jang, Yeon-Gil;Rhee, Young-Chul
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.1
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    • pp.1-7
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    • 2012
  • In this paper, An X-band solid state power amplifier(SSPA) for pulse compressed microwave signal with 60Watt power and power added efficiency(PAE) above 30% is described. Designed 60Watt high power amplifier(HPA) was implemented by cascade coupled amplifiers, and it is consisted on three stage drive amplifiers with internally matched GaAs FET and one stage main power amplifier with an internally matched GaN HEMT. The designed SSPA has performance with more than total power gain 37dB and output power 48dBm(60-W) in condition of frequency range $9.41{\pm}0.03GHz$, pulse period width under 1ms and duty cycle under 10%. The implemented SSPA can apply to high quality digital marine radar applications with pulse compression technique.

GaN HEMT Based High Power and High Efficiency Doherty Amplifiers with Digital Pre-Distortion Correction for WiBro Applications

  • Park, Jun-Chul;Kim, Dong-Su;Yoo, Chan-Sei;Lee, Woo-Sung;Yook, Jong-Gwan;Chun, Sang-Hyun;Kim, Jong-Heon;Hahn, Cheol-Koo
    • Journal of electromagnetic engineering and science
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    • v.11 no.1
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    • pp.16-26
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    • 2011
  • This paper presents high power and high efficiency Doherty amplifiers for 2.345 GHz wireless broadband (WiBro) applications that use a Nitronex 125-W ($P_{3dB}$) GaN high electron mobility transistor (HEMT). Two- and three-way Doherty amplifiers and a saturated Doherty amplifier using Class-F circuitry are implemented. The measured result for a center frequency of 2.345 GHz shows that the two-way Doherty amplifier attains a high $P_{3dB}$ of 51.5 dBm, a gain of 12.5 dB, and a power-added efficiency (PAE) improvement of about 16 % compared to a single class AB amplifier at 6-dB back-off power region from $P_{3dB}$. For a WiBro OFDMA signal, the Doherty amplifier provides an adjacent channel leakage ratio (ACLR) at 4.77 MHz offset that is -33 dBc at an output power of 42 dBm, which is a 9.5 dB back-off power region from $P_{3dB}$. By employing a digital pre-distortion (DPD) technique, the ACLR of the Doherty amplifier is improved from -33 dBc to -48 dBc. The measured result for the same frequency shows that the three-way Doherty amplifier, which has a $P_{3dB}$ of 53.16 dBm and a gain of 10.3 dB, and the saturated Doherty amplifier, which has a $P_{3dB}$ of 51.1 dBm and a gain of 10.3 dB, provide a PAE improvement of 11 % at the 9-dB back-off power region and 7.5 % at the 6-dB back-off region, respectively, compared to the two-way Doherty amplifier.

Design of High Efficiency Switching-Mode Doherty Power Amplifier Using GaN HEMT (GaN HEMT를 이용한 고효율 스위칭 모드 도허티 전력증폭기 설계)

  • Choi, Gil-Wong;Kim, Hyoung-Jong;Choi, Jin-Joo;Kim, Seon-Joo
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.9 no.5
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    • pp.72-79
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    • 2010
  • In this paper, we describe the design and implementation of a high efficiency Doherty power amplifier using gallium nitride (GaN) high-electron mobility transistor (HEMT). The carrier and peaking amplifiers of the proposed Doherty power amplifier consist of the switching-mode Class-E power amplifiers. The test conditions are a duty of 10% and a pulse width of $100\;{\mu}s$ and pulse repetition frequency (PRF) of 1 kHz for a S-band radar application. A RF performance peak PAE of 64% with drain efficiency of 80.6%, at 6 dB output back-off point from saturated output power of 45.5 dBm, was obtained at 2.85 GHz.