• Journal of the Semiconductor & Display Technology
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• v.17 no.1
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• pp.21-26
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• 2018

In this paper, a multiple coupling inductor with expandable-integrated magnetic structure was proposed to enable miniaturization of external switched mode power supply (SMPS) for a large display. Inductance formula of the proposed inductor structure was derived through magnetic circuit analysis for a simple inductance designing process. The proposed inductor was applied into a 1kW class interleaved bridgeless power factor correction circuit which requires four inductors, and experimental steady state result of the circuit was compared. According to the experimental result, it was found that the proposed multiple coupling inductor shows the electrical characteristics that can replace the conventional separated inductors and is suitable for miniaturization of the SMPS since the circuit configuration is possible with one shared inductor.

• Journal of the Semiconductor & Display Technology
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• v.20 no.2
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• pp.25-28
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• 2021

In this paper, we studied smart phone RF wireless charging with 5.8-GHz microwave wireless power receiver. The dc output of the receiver connected to super capacitor and DC-DC converter for charging a smart phone. This configuration stably supplies 5V and current for charging it. Studies show that the more receivers are used at close range, the higher the received voltage values and the larger the capacity of the super capacitor, the longer the charging time. The present 5.8-GHz 1W wireless power transmission system is not enough for charging a smartphone mainly due to the lack of current of the receiver.

• Journal of Sensor Science and Technology
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• v.30 no.2
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• pp.82-87
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• 2021

In this paper, we propose a high-speed, low-power complementary metal-oxide semiconductor (CMOS) binary image sensor featuring a gate/body-tied (GBT) p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET)-type photodetector based on a double-tail comparator. The GBT photodetector forms a structure in which the floating gate (n+ polysilicon) and body of the PMOSFET are tied, and amplifies the photocurrent generated by incident light. The double-tail comparator compares the output signal of a pixel against a reference voltage and returns a binary signal, and it exhibits improved power consumption and processing speed compared with those of a conventional two-stage comparator. The proposed sensor has the advantages of a high signal processing speed and low power consumption. The proposed CMOS binary image sensor was designed and fabricated using a standard 0.18 ㎛ CMOS process.

• Journal of the Semiconductor & Display Technology
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• v.20 no.4
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• pp.68-71
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• 2021

In this paper, GaN-SBD devices with excellent breakdown voltage and frequency characteristics for use in high-power microwave wireless power transmission has been modeled for PSpice circuit simulation. The RF-DC conversion circuits were simulated and compared with a commercial Si-SBD device. Although the modeled GaN-SBD devices had lower RF-DC conversion efficiency compared to Si-SBD at 2.4 and 5.8 GHz, it was confirmed through PSpice circuit simulations that they can be used sufficiently according to the required application circuit in a high power situation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.9
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• pp.755-758
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• 2012

We developed a new solar simulator to evaluate a large-scale solar cell using seven kinds of LEDs (Infrared, Red, Yellow, Green, Blue, White and Ultra Violet LED). LED solar simulator can be displaced the existing solar simulator which has several demerits such as high power consumption and short lifetime. We have tried to fabricate LED solar simulator which fulfills the spectrum for AM 1.5G condition, and to verify the feasibility of LED solar simulator.

• Journal of the Semiconductor & Display Technology
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• v.22 no.1
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• pp.43-48
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• 2023

This paper discusses the design of 32Mbyte asynchronous nonvolatile memory modules, which includes self-diagnosis and RTC (Real Time Clock) functions to enhance their data stability and reliability. Nonvolatile memory modules can maintain data even in a power-off state, thereby improving the stability and reliability of a system or device. However, due to the possibility of data error due to electrical or physical reasons, additional data loss prevention methods are required. To minimize data error in asynchronous nonvolatile memory modules, this paper proposes the use of voltage monitoring circuits, self-diagnosis, BBT (Bad Block Table), ECC (Error Correction Code), CRC (Cyclic Redundancy Check)32, and data check sum, data recording method using RTC. Prototypes have been produced to confirm correct operation and suggest the possibility of commercialization.

• Electronics and Telecommunications Trends
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• v.38 no.6
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• pp.52-61
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• 2023

With semiconductor scaling approaching the physical limits, devices including CMOS (complementary metal-oxide-semiconductor) components have managed to overcome yet are currently struggling with several technical issues like short-channel effects. Evolving from the process node of 22 nm with FinFET (fin field effect transistor), state-of-the-art semiconductor technology has reached the 3 nm node with the GAA-FET (gate-all-around FET), which appropriately addresses the main issues of power, performance, and cost. Technical problems remain regarding the foundry of GAA-FET, and next-generation devices called post-GAA transistors have not yet been devised, except for the CFET (complementary FET). We introduce a CFET that spatially stacks p- and n-channel FETs on the same footprint and describe its structure and fabrication. Technical details like stacking of nanosheets, special spacers, hetero-epitaxy, and selective recess are more thoroughly reviewed than in similar articles on CFET fabrication.

• Korean Chemical Engineering Research
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• v.62 no.3
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• pp.225-232
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• 2024

The reduction of CO₂ emissions in the energy production sector, which accounts for 86.8% of total greenhouse gas emissions, is important to achieve carbon-neutrality. At present, 60% of total power generation in South Korea is coal and natural gas. Replacing fossil fuel with renewable energy such as wind and solar has disadvantages of unstable energy supply and high costs. Therefore, this study was conducted through the co-firing of natural gas, ammonia and hydrogen utilizing the natural gas combined cycle process. The results demonstrated reduction in CO₂ emissions and 34%~238% of the power production compared to using only natural gas. Case studies on mass fractions of natural gas, ammonia and hydrogen indicated that power production and NO_x emissions were inversely proportional to the ammonia ratio and directly proportional to the hydrogen ratio. This study provides guidelines for the use of various fuel mixtures and economic analysis in co-firing power generation.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.287-287
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• 2012

최근 투명 산화물 반도체(TOS: Transparent Oxide Semiconductor)중에 비정질 산화물 반도체(amorphous oxide semiconductor)를 이용한 트랜지스터 연구가 활발히 진행되고 있다. 비정질 산화물 반도체는 박막 트렌지스터 소자의 Active Layer으로 사용할 수 있다. 본 연구는 RF magnetron sputtering법으로 유리기판 위에 IGZO박막을 증착하였다. 박막 증착 조건은 초기 압력 $3.0{\times}10^{-6}$ Torr, 증착 압력 20 mTorr, 반응가스 Ar 50 sccm, RF power 30w, 증착 온도는 실온으로 고정하였으며, 공정변수로 증착 시간을 변화시키며 IGZO박막을 증착하였다. IGZO 타겟은 $In_2O_3$, $Ga_2O_3$, ZnO 분말을 각각 1:1:1 mol% 조성비로 혼합하여 소결한 타겟을 사용하였다. XRD 분석결과에 따라서 Bragg's 법칙을 만족하는 피크가 나타나지 않는 비정질 구조임을 확인할 수 있었다. 가시광 영역에서(450~700 nm) 모든 박막은 90% 이상 투과도를 나타내었다. 증착시간이 증가할수록 밴드갭이 감소하는 것을 확인하였다. 증착시간이 5분인 경우 캐리어 농도는 $2.2{\times}10^{19}$ $cm^{-3}$, 이동도는 7.5 $cm^2/V-s$, 비저항은 $3.8{\times}10^{-2}{\Omega}$-cm의 반도체 특성을 나타냈고, 박막 트렌지스터 소자의 Active Layer으로 사용할 수 있다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.14-14
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• 2010

A high voltage current sensing circuit for LED driver IC is designed and verfied by Cadence SPECTRE simulations. The current mirror pair, power and sensing MOSFETs with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side LDMOST switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35um BCD process show that current sensing is accurate with properly frequency compensated opamp.