• The Journal of Korea Robotics Society
• /
• v.8 no.1
• /
• pp.29-36
• /
• 2013

This paper presents a sensitivity optimization of a MEMS (microelectromechanical systems) gyroscope for a magnet-gyro system. The magnet-gyro system, which is a guidance system for a AGV (automatic or automated guided vehicle), uses a magnet positioning system and a yaw gyroscope. The magnet positioning system measures magnetism of a cylindrical magnet embedded on the floor, and AGV is guided by the motion direction angle calculated with the measured magnetism. If the magnet positioning system does not measure the magnetism, the AGV is guided by using angular velocity measured with the gyroscope. The gyroscope used for the magnet-gyro system is usually MEMS type. Because the MEMS gyroscope is made from the process technology in semiconductor device fabrication, it has small size, low-power and low price. However, the MEMS gyroscope has drift phenomenon caused by noise and calculation error. Precision ADC (analog to digital converter) and accurate sensitivity are needed to minimize the drift phenomenon. Therefore, this paper proposes the method of the sensitivity optimization of the MEMS gyroscope using DEAS (dynamic encoding algorithm for searches). For experiment, we used the AGV mounted with a laser navigation system which is able to measure accurate position of the AGV and compared result by the sensitivity value calculated by the proposed method with result by the sensitivity in specification of the MEMS gyroscope. In experimental results, we verified that the sensitivity value through the proposed method can calculate more accurate motion direction angle of the AGV.

• Applied Chemistry for Engineering
• /
• v.18 no.5
• /
• pp.506-510
• /
• 2007

Vacuum deposited 4,4',4''-tris(N-(1-naphthyl)-N-phenylamino)-triphenylamine (1-TNATA), a widely-used semiconductor material, is placed as a thin interlayer between indium tin oxide (ITO) electrode and a hole transporting layer (HTL) in OLEDs and a well-stacked 1-TNATA layer leads to stable and high efficiency devices by reducing the carrier injection barrier at the interface between the ITO anode and hole transport layers. According to Raman spectra, thermal annealing after deposition as well as electromagnetic field treatment during deposition lead to closer stacking of 1-TNATA molecules and resulted in molecular ordering. By thermal annealing at about $110^{\circ}C$, an increase in current flow through the film by over 25% was observed. Molecularly-ordered 1-TNATA films played an important role in achieving higher luminance efficiency as well as higher power efficiency of the multi-layered organic EL devices in the present work. Electromagnetic field treatment during deposition was less effective compared to thermal annealing

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.10 no.11
• /
• pp.3087-3093
• /
• 2009

Digital filters are indispensible element in digital signal processing area. The performance of digital filter based on adding and multiplying operation, such as computational speed and power consuming is determined by the orders and coefficients of filter which has on effect area of semiconductor chip when it is implemented by VLSI technology. In this research, in order to performance improvement of digital filter, we proposed the algorithm to speed-up the operation of digital filter associated with the minimum signed digit representation of binary number system and method to simplify the digital filter design associated with common subexpression elimination. The performance of proposed method is evaluated by the computational speed and design-simplicity by experimental implemented digital filter on FPGA.

• Proceedings of the Korean Institute of Surface Engineering Conference
• /
• 2018.06a
• /
• pp.52-52
• /
• 2018

Only approximately 30% of fossil fuel energy is used; therefore, it is desirable to utilize the huge amounts of waste energy. Thermoelectric (TE) materials that convert heat into electrical power are a promising energy technology. The TE materials can be formed either as thin films or as bulk semiconductors. Generally, thin-film TE materials have low energy conversion rates due to their thinness compared to that in bulk. However, an advantage of a thin-film TE material is that the efficiency can be smartly engineered by controlling the nanostructure and composition. Especially nanostructured TE thin films are useful for mitigating heating problems in highly integrated microelectronic devices by accurately controlling the temperature. Hence, there is a rising interest in thin-film TE devices. These devices have been extensively investigated. It is demonstrated that transparent amorphous oxide semiconductors (TAOS) can be excellent thermoelectric (TE) materials, since their thermal conductivity (${\kappa}$) through a randomly disordered structure is quite low, while their electrical conductivity and carrier mobility (${\mu}$) are high, compared to crystalline semiconductors through the first-principles calculations and the various measurements for the amorphous In-Zn-O (a-IZO) thin film. The calculated phonon dispersion in a-IZO shows non-linear phonon instability, which can prevent the transport of phonon. The a-IZO was measured to have poor ${\kappa}$ and high electrical conductivity compared to crystalline $In_2O_3:Sn$ (c-ITO). These properties show that the TAOS can be an excellent thin-film transparent TE material. It is suggested that the TAOS can be employed to mitigate the heating problem in the transparent display devices.

• Transactions on Electrical and Electronic Materials
• /
• v.11 no.2
• /
• pp.73-76
• /
• 2010

The copper indium disulfide ($CuInS_2$) thin film was manufactured using sputtering and thermal evaporation methods, and the annealing with sulfurization process was used in the vacuum chamber to the substrate temperature on the glass substrate, the annealing temperature and the composition ratio, and the characteristics thereof were investigated. The $CuInS_2$ thin film was manufactured by the sulfurization of a soda lime glass (SLG) Cu/In/S stacked [1] elemental layer deposited on a glass substrate by vacuum chamber annealing [2] with sulfurization for various times at a temperature of substrate temperature of $200^{\circ}C$. The structure and electrical properties of the film was measured in order to determine the optimum conditions for the growth of $CuInS_2$ ternary compound semiconductor $CuInS_2$ thin films with a non-stoichiometric composition. The physical properties of the thin film were investigated under various fabrication conditions [3,4], including the substrate temperature, annealing temperature and annealing time by X-ray diffraction (XRD), field Emission scanning electron microscope (FE-SEM), and Hall measurement systems. [5] The sputtering rate depending upon the DC/RF power was controlled so that the composition ratio of Cu versus In might be around 1:1, and the substrate temperature affecting the quality of the film was varied in the range of room temperature (RT) to $300^{\circ}C$ at intervals of $100^{\circ}C$, and the annealing temperature of the thin film was varied RT to $550^{\circ}C$ in intervals of $100^{\circ}C$.

• Korean Journal of Materials Research
• /
• v.22 no.11
• /
• pp.636-641
• /
• 2012

In this study, we have investigated highly efficient nanoscale surface corrugated light emitting diodes (LEDs) for the enhancement of light extraction efficiency (LEE) of nitride semiconductor LEDs. Nanoscale indium tin oxide (ITO) surface corrugations are fabricated by using the conformal nanoimprint technique; it was possible to observe an enhancement of LEE for the ITO surface corrugated LEDs. By incorporating this novel method, we determined that the total output power of the surface corrugated LEDs were enhanced by 45.6% for patterned sapphire substrate LEDs and by 41.9% for flat c-plane substrate LEDs. The enhancement of LEE through nanoscale surface corrugations was studied using 3-dimensional Finite Different Time Domain (FDTD) calculation. From the FDTD calculations, we were able to separate the light extraction from the top and bottom sides of device. This process revealed that light extraction from the top and bottom sides of a device strongly depends on the substrate and the surface corrugation. We found that enhanced LEE could be understood through the mechanism of enhanced light transmission due to refractive index matching and the increase of light scattering from the corrugated surface. LEE calculations for the encapsulated LEDs devices also revealed that low LEE enhancement is expected after encapsulation due to the reduction of the refractive index contrast.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.16 no.4
• /
• pp.425-435
• /
• 2016

This paper describes a spread-spectrum clock generation method by utilizing a ${\Delta}{\Sigma}$ digital PLL (DPLL) which is solely based on binary phase detection and does not require a linear time-to-digital converter (TDC) or other linear digital-to-time converter (DTC) circuitry. A 1-bit high-order ${\Delta}{\Sigma}$ modulator and a hybrid finite-impulse response (FIR) filter are employed to mitigate the phase-folding problem caused by the nonlinearity of the bang-bang phase detector (BBPD). The ${\Delta}{\Sigma}$ DPLL employs a two-point modulation technique to further enhance linearity at the turning point of a triangular modulation profile. We also show that the two-point modulation is useful for the BBPLL to improve the spread-spectrum performance by suppressing the frequency deviation at the input of the BBPD, thus reducing the peak phase deviation. Based on the proposed architecture, a 3.2 GHz spread-spectrum clock generator (SSCG) is implemented in 65 nm CMOS. Experimental results show that the proposed SSCG achieves peak power reductions of 18.5 dB and 11 dB with 10 kHz and 100 kHz resolution bandwidths respectively, consuming 6.34 mW from a 1 V supply.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.14 no.4
• /
• pp.427-435
• /
• 2014

Segmented-channel MOSFETs (SegFETs) can achieve both good performance and variation robustness through the use of $HfO_2$ (a high-k material) to create the shallow trench isolation (STI) region and the very shallow trench isolation (VSTI) region in them. SegFETs with both an HTI region and a VSTI region (i.e., the STI region is filled with $HfO_2$, and the VSTI region is filled with $SiO_2$) can meet the device specifications for high-performance (HP) applications, whereas SegFETs with both an STI region and a VHTI region (i.e., the VSTI region is filled with $HfO_2$, and the STI region is filled with $SiO_2$) are best suited to low-standby power applications. AC analysis shows that the total capacitance of the gate ($C_{gg}$) is strongly affected by the materials in the STI and VSTI regions because of the fringing electric-field effect. This implies that the highest $C_{gg}$ value can be obtained in an HTI/VHTI SegFET. Lastly, the three-dimensional TCAD simulation results with three different random variation sources [e.g., line-edge roughness (LER), random dopant fluctuation (RDF), and work-function variation (WFV)] show that there is no significant dependence on the materials used in the STI or VSTI regions, because of the predominance of the WFV.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.26 no.1
• /
• pp.44-48
• /
• 2013

Niobium oxide($Nb_2O_5$) films were deposited on p-type Si wafers at room temperature using in-line pulsed-DC magnetron sputtering system with various frequencies. The different duty ratios were obtained by varying the frequency of pulsed DC power from 100 to 300 kHz at the fixed reverse time of $1.5{\mu}s$. From the thickness of the sputtered $NbO_x$ films, it was possible to obtain much higher deposition rate in case of pulsed-DC sputtering than RF sputtering. However, the similar leakage currents and structural characteristics were obtained from the metal-insulator-semiconductor(MIS) structure fabricated with the $NbO_x$ films and the x-ray photoelectron spectroscopy(XPS) results in spite of the different deposition rates. From the experimental results, the $NbO_x$ films sputtered by pulsed-DC sputtering are expected to be used in the fabrication process instead of RF sputtering.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.65 no.12
• /
• pp.2000-2007
• /
• 2016

Generally, in order to implement the CRM(Critical Conduction Mode), the analog controller is used rather than a digital controller because the control is simple and uses less power. However, according to the semiconductor technology development and various user needs, digital control system based on a DSP is on the rise. Therefore, in this paper, the CRM bridgeless PFC converter based on a digital control is proposed. It is necessary to detect the inductor current when it reaches zero and peak value, for calculating the on time and off time by using the current information. However, in this paper, the on-time and off-time are calculated by using the proposed algorithm without any current information. If the switching-times are calculated through the steady-state analysis of the converter, they do not reflect transient status such as starting-up. Therefore, the calculated frequency is out of range, and the transient current is generated. In order to solve these problems, limitation method of the on-time and off-time is used, and the limitation values are varied according to the voltage reference. In addition, in steady state, depending on the switching frequency, the inductance is varied because of the resonance between the inductor and the parasitic capacitance of the switching elements. In order to solve the problem, inductance are measured depending on the switching frequency. The measured inductance are used to calculate the switching time for preventing the transient current. Simulation and experimental results are presented to verify the proposed method.