• Journal of the Semiconductor & Display Technology
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• v.10 no.2
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• pp.13-17
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• 2011

We have developed a new energy-consuming monitoring system that has made it possible to measure the energy consumption of a gas scrubber, one of semiconductor processing equipments, and installed this system to the gas scrubber under operating at a manufacture site. Using this system, we have measured consumptions of electric power and processing gas consumed at standby to operating mode. In case of the gas scrubber, processing gas flows continuously into it at standby and operating mode. Therefore, if the electric power has been supplied, the processing gas can flows into the device for 24 hours. Moreover, at operating of gas scrubber, the amount of electricity consumption is 5 kWh. At Standby of gas scrubber, it spends 3kwh. It is certain that the energy consumption is greater at operating mode than at standby mode. The carbon emission rates from 24 hour gas scrubber operation are 236 $kgCO_2$/day of $N_2$, 57 $kgCO_2$/day of electric power and 0.001 $kgCO_2$/day of cooling water. Most of carbon is emitted from $N_2$ gas and electric power consumption.

• Journal of Power Electronics
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• v.11 no.5
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• pp.639-654
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• 2011

This paper presents a Current Distribution Control design for Paralleled Positive Output Elementary Super Lift Luo Converters (PPOESLLCs) operated in Continuous Conduction Mode using a Sliding Mode Controller (SMC). Manipulating the higher current requirement of the load through the paralleling of POESLLCs, results in a current inequality. This is mainly due to dissimilarities in the power semiconductor switches and circuit components used in POESLLCs, which may lead to converter failures. In order to balance the proper load current sharing and the load voltage regulation of PPOESLLCs, a SMC is developed. The SMC is designed for the inherently variable-structured of POESLLCs by using the state-space average based model. The static and dynamic performance of the developed controller with PPOESLLCs is validated for its robustness to perform over a wide range of operating conditions through both a laboratory prototype and MatLab/Simulink models, which are compared with a Proportional-Integral (PI) controller. Theoretical analysis, simulation and experimental results are presented to demonstrate the feasibility of the developed SMC along with the complete design procedure.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.12
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• pp.1709-1717
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• 2015

In remote islands PV (Photo Voltaic) panel with BESS (Battery Energy Storage System) supplies electric power to the customers in parallel operation with EG (Engine Generator) to save fuel consumption and to mitigate environmental load. BESS operates in voltage control mode when it supplies power to the load alone, while it operates in current control mode when it supplies power to the load in parallel with EG. This paper proposes a smooth mode change scheme from current control to voltage control of BESS by adding proper initial value to the integral part of voltage control, and a smooth mode change scheme from voltage control to current control by tracking the EG output voltage to the BESS output voltage using PLL (Phase-Locked Loop). The feasibility of proposed schemes was verified through computer simulations with PSCAD/EMTDC, and the feasibility of actual hardware system was verified by experiments with scaled prototype. It was confirmed that the proposed schemes offer a seamless operation in the stand-alone power system in remote islands.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.7
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• pp.2570-2578
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• 2010

This paper presents a digital-controlled single-phase power-factor correction (PFC) converter operating in critical current conduction mode. The proposed converter utilizes the DC-DC boost converter topology for the PFC and operates the inductor current in critical conduction mode. Because the proposed converter is controlled digitally using a micom, its control circuit is simplified and the converter operates more effectively. This paper first explains the operational principles of the proposed converter and then analyzes the converter circuit. And this paper explains the implementation method of proposed converter with a detail design example, which is divided into software and circuit design parts. Also, it is shown through the experimental results of the prototype converter by the designed circuit parameters that the proposed converter has good performance as a single-phase PFC converter.

• Journal of the Optical Society of Korea
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• v.19 no.3
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• pp.255-259
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• 2015

We have proposed and experimentally verified a pulse-width modulation (PWM) generator which directly generated a PWM signal in the optical domain. Output waveforms were clear at the repetition rate of 16 MHz; the duty cycle (DC) was from 14.7% to 72.1%; and the DC-control resolution was about 4.399%/dB. The PWM generator' operation principle is based on the injection-locking property of a single-mode Fabry-$P{\acute{e}}rot$ laser diode (SMFP-LD). The SMFP-LD, which has a self-locked mode wavelength at ${\lambda}_{PWM}$, was used to detect the power of the injection-locking signal (optical analog input). If the analog input power is high, the SMFP-LD is locked to the wavelength of the input signal ${\lambda}_a$ and there is no output after an optical bandpass filter (OBF). If the analog input power is low, the SMFP-LD is unlocked and there is output signal at ${\lambda}_{PWM}$ after the OBF. Thus, the SMFP-LD plus the OBF provide digital output for an analog input. The DC of the output PWM signal can be controlled by tuning the power of the analog input.

• Journal of Sensor Science and Technology
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• v.32 no.6
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• pp.432-440
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• 2023

This study introduces an efficient readout circuit designed for two-electrode electrocardiogram (ECG) recording, characterized by its low-noise and low-power consumption attributes. Unlike its three-electrode counterpart, the two-electrode ECG is susceptible to common-mode interference (CMI), causing signal distortion. To counter this, the proposed circuit integrates a common-mode charge pump (CMCP) with a window comparator, allowing for a CMI tolerance of up to 20 V_PP. The CMCP design prevents the activation of electrostatic discharge (ESD) diodes and becomes operational only when CMI surpasses the predetermined range set by the window comparator. This ensures power efficiency and minimizes intermodulation distortion (IMD) arising from switching noise. To maintain ECG signal accuracy, the circuit employs a chopper-stabilized instrumentation amplifier (IA) for low-noise attributes, and to achieve high input impedance, it incorporates a floating high-pass filter (HPF) and a current-feedback instrumentation amplifier (CFIA). This comprehensive design integrates various components, including a QRS peak detector and serial peripheral interface (SPI), into a single 0.18-㎛ CMOS chip occupying 0.54 mm². Experimental evaluations showed a 0.59 µV_RMS noise level within a 1-100 Hz bandwidth and a power draw of 23.83 µW at 1.8 V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.477-477
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• 2009

Bimodal Tram developed by KRRI is driven by a series Hybrid propulsion system which has both the CNG engine, generator and LPB(Lithium Polymer Battery) pack. It has three driving modes; Hybrid mode, Engine mode and Battery mode. Even in case of Battery mode, LPB pack to get enough power to drive the vehicle only by itself onsists of 168 LPB cells(80Ah per lcell), 650V. It is important thing to manage LPB pack in a right way, which will extend the lifetime of LPB cells and operate in the hybrid mode effectively. This paper has shown the development of battery management system(12 BMS, 1 BMS per 14cells) to manage LPB pack which is connected with CAN(Controller Area Network) each other and measure the voltage, current, temperature and also control the cooling fan inside of LPB pack. Using the measured data, BMS can show the SOC(State of Charge), SOH(State of Health) and other status of LPB pack including of the cell balancing.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.21 no.11
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• pp.1029-1035
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• 2011

Pressure pulsation of exciting sources that generally occurs on the piping system connected to the discharge of BFP(boiler feed water pump) in power plants causes wave reflection, wave interference, resonance, standing wave and so on. But if the operating speed of the pump is changed, the state of the noise and vibration can be done because characteristics of the exciting source are changed. This paper is to investigate the cause of the noise and vibration occurring on the piping system when the operating speed of BFP is down in accordance with lowering of the power generation. It is approached to two points of view ; Firstly, it is examined whether the pulsation source impacts on the shell mode vibration that vibrates radially across the cross-section of the pipe. But it doesn't affect the shell mode as much as the resonance occurs. Secondly, to find the relation between the pulsation source and the acoustic mode of the piping system, analysis for the piping system by indirect BEM(boundary element method) is carried out. Therefore it is investigated that the mechanism of the noise and vibration relates with acoustic mode of the piping system.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.4
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• pp.445-453
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• 2015

A fully integrated cost-effective and low-power single chip Lithium-Ion (Li-Ion) battery protection IC (BPIC) for portable devices is presented. The control unit of the battery protection system and the MOSFET switches are integrated in a single package to protect the battery from over-charge, over-discharge, and over-current. The proposed BPIC enters into low-power standby mode when the battery becomes over-discharged. A new auto release function (ARF) is adopted to release the BPIC from standby mode and safely return it to normal operation mode. A new delay shorten mode (DSM) is also proposed to reduce the test time without increasing pin counts. The BPIC implemented in a $0.18-{\mu}m$ CMOS process occupies an area of $750{\mu}m{\times}610{\mu}m$. With DSM enabled, the measured test time is dramatically reduced from 56.82 s to 0.15 s. The BPIC chip consumes $3{\mu}A$ under normal operating conditions and $0.45{\mu}A$ under standby mode.

• Journal of Power Electronics
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• v.18 no.3
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• pp.923-930
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• 2018

Based on the application of an integrated dynamic brake (IDB) system that uses a PWM inverter fed-AC motor drive to operate the piston, a new active zero state PWM (AZSPWM) is proposed to improve the stability and reliability of the IDB system by suppressing the conducted electro-magnetic interference (EMI) noise under a wide range of load torque. The new AZSPWM reduces common-mode voltage (CMV) by one-third when compared to that of the conventional space vector PWM (CSVPWM). Although this method slightly increases the output current ripple by reducing the CMV, like the CSVPWM, it can be used within the full range of the load torque. Further, unlike other reduced common-mode voltage (RCMV) PWMs, it does not increase the switching power loss. A theoretical analysis is presented and experiments are performed to demonstrate the effectiveness of this method.