• Title/Summary/Keyword: Power Distribution Network Impedance

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Development of Signal Coupler for Power Line Communication over Medium Voltage Distribution Line (고압 배전선로 전력선 통신 신호결합장치 개발)

  • Lee Jae-Jo;Park Young-Jin;Oh Hui-Myoung;Kim Kwan-Ho;Lee Dae-Young
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.6
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    • pp.409-416
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    • 2005
  • For broadband high-data-rate power line communication with the allocated frequency bandwidth from 2 to 30 MHz on medium voltage (MV) distribution power lines, a signal coupling unit is developed. The coupling unit is composed of a coupling capacitor for coupling communication signal, a drain coil, and an impedance matching part. The coupling capacitor made of ceramic capacitor is designed for transmission property of better than 1 dB in the frequency range. The drain coil is used for preventing low frequency high voltage from junction of medium voltage power line in case that a coupling capacitor is not working properly any more. Also, using ferrite core, a novel broadband impedance matching transformer is developed. A complete coupling unit with a coupling capacitor, a drain coil, and a matching transformer is housed by polymer for good isolation and distinguishing from high voltage electric facilities. Each is fabricated and its frequency behavior is tested. Finally, complete signal couplers are equipped in a MV PLC test bed and their performance are measured. The measurement shows that the coupling capacitor works excellently.

A Study on High Impedance Fault Detection using Lifting Scheme (Lifting을 이용한 고저항고장 검출에 관한 연구)

  • Hong, D.S.;Yim, H.Y.
    • Proceedings of the KIEE Conference
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    • 2002.07d
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    • pp.2228-2230
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    • 2002
  • The research presented in this paper focuses on a method for the detection of High Impedance Fault(HIF). The method will use the Lifting and neural network system. HIF on the multi-grounded three-phase four-wires primary distribution power system cannot be detected effectively by existing over current sensing devices. These paper describes the application of lifting scheme to the various HIF data. These data were measured in actual 22.9kV distribution system. Wavelet transform analysis gives the frequency and time-scale information. The neural network system as a fault detector was trained to discriminate HIF from the normal status by a gradient descent method. The proposed method performed very well by proving the right state when it was applied staged fault data and normal load mimics HIF, such as arc-welder.

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Impedance Calculation of Power Distribution Networks for High-Speed DRAM Module Design (고속DRAM모듈 설계에 대한 전원평면의 임피던스계산)

  • Lee, Dong-Ju;Younggap You
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.3
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    • pp.49-60
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    • 2002
  • A systematic design approach for Power distribution network (PDN) is presented aiming at applications to DRAM module designs. Three main stages are comprised in this design approach: modeling and simulation of a PDN based on a two-dimensional transmission line structure employing a partial element equivalent circuit (PEEC); verification of the simulation results through comparison to measured values; and design space scanning with PDN parameters. Impedance characteristics for do-coupling capacitors are analyzed to devise an effective way to stabilize power and ground plane Performance within a target level of disturbances. Self-impedance and transfer-impedance are studied in terms of distance between circuit features and the size of do-coupling capacitors. A simple equation has been derived to find the do-coupling capacitance values yielding impedance lower than design target, and thereby reducing the overall computation time. The effectiveness of the design methodology has been demonstrated using a DRAM module with discrete do-coupling capacitors and a strip structure.

A Study on High Impedance Fault Detection using Fast Wavelet Transforms (고속 웨이브렛을 이용한 고저항 고장 검출에 관한 연구)

  • Hong, D.S.;Shim, J.C.;Jong, B.H.;Yun, S.Y.;Bae, Y.C.;Ryu, C.W.;Yim, H.Y.
    • Proceedings of the KIEE Conference
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    • 2001.07d
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    • pp.2184-2186
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    • 2001
  • The research presented in this paper focuses on a method for the detection of High Impedance Fault(HIF). The method will use the fast wavelet transform and neural network system. HIF on the multi-grounded three-phase four-wires primary distribution power system cannot be detected effectively by existing over current sensing devices. These paper describes the application of fast wavelet transform to the various HIF data. These data were measured in actual 22.9kV distribution system. Wavelet transform analysis gives the frequency and time-scale information. The neural network system as a fault detector was trained to discriminate HIF from the normal status by a gradient descent method. The proposed method performed very well by proving the right state when it was applied staged fault data and normal load mimics HIF, such as arc-welder.

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DSP based Real-Time Fault Determination Methodology using Artificial Neural Network in Smart Grid Distribution System (스마트 그리드 배전계통에서 인공신경회로망을 이용한 DSP 기반 실시간 고장 판단 방법론 기초 연구)

  • Jin-Eun Kim;Yu-Rim Lee;Jung-Woo Choi;Byung-Hoon Roh;Yun-Seok Ko
    • The Journal of the Korea institute of electronic communication sciences
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    • v.18 no.5
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    • pp.817-826
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    • 2023
  • In this paper, a fault determination methodology based on an artificial neural network was proposed to protect the system from faults on the lines in the smart grid distribution system. In the proposed methodology, first, it was designed to determine whether there is a low impedance line fault (LIF) based on the magnitude of the current RMS value, and if it is determined to be a normal current, it was designed to determine whether a high impedance ground fault (HIF) is present using Normal/HIF classifier based on artificial neural network. Among repetitive DSP module-based algorithm verification tests, the normal/HIF classifier recognized the current waveform as normal and did not show reclosing operation for the cases of normal state current waveform simulation test where the RMS value was smaller than the minimum operating current value. On the other hand, for the cases of LIF where RMS value is greater than the minimum operating current value, the validity of the proposed methodology could be confirmed by immediately recognizing it as a fault state and showing reclosing operation according to the prescribed procedure.

Power Integrity and Shielding Effectiveness Modeling of Grid Structured Interconnects on PCBs

  • Kwak, Sang-Keun;Jo, Young-Sic;Jo, Jeong-Min;Kim, So-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.3
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    • pp.320-330
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    • 2012
  • In this paper, we investigate the power integrity of grid structures for power and ground distribution on printed circuit board (PCB). We propose the 2D transmission line method (TLM)-based model for efficient frequency-dependent impedance characterization and PCB-package-integrated circuit (IC) co-simulation. The model includes an equivalent circuit model of fringing capacitance and probing ports. The accuracy of the proposed grid model is verified with test structure measurements and 3D electromagnetic (EM) simulations. If the grid structures replace the plane structures in PCBs, they should provide effective shielding of the electromagnetic interference in mobile systems. An analytical model to predict the shielding effectiveness (SE) of the grid structures is proposed and verified with EM simulations.

Preparation of Large Area Plasma Source by Helical Resonator Arrays (Helical Resonator 배열을 통한 대면적 고밀도 Plasma Source)

  • 손민영;김진우;박세근;오범환
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.282-285
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    • 2000
  • Four helical resonators are distributed in a 2 ${\times}$ 2 array by modifying upper part of the conventional reactive ion etching(RIE) type LCD etcher in order to prepare a large area plasma source. Since the resonance condition of the RF signal to the helical antenna, one RF power supply is used for delivering the power efficiently to all four helical resonators without an impedance matching network Previous work of 2 ${\times}$ 2array inductively coupled plasma(ICP)requires one matching circuit to each ICP antenna for more efficient power deliverly Distributions of ion density and electron temperature are measured in terms of chamber pressure, gas flow rate and RF power . By adjusting the power distribution among the four helical resonator units, argon plasma density of higher than 10$\^$17/㎥ with the uniformity of better than 7% can be obtained in the 620 ${\times}$ 620$\textrm{mm}^2$ chamber.

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The Installable Maximum DG Capacity Considering LDC Parameters of ULTC and SVR in Distribution Systems (ULTC 와 SVR 이 설치된 배전계통에서 LDC Parameters 을 고려한 최대 DG 용량 산정)

  • Kim, Mi-Young;Hara, Ryoichi;Kita, Hiroyuki
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.27-28
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    • 2008
  • For stable and sustainable energy supply, distributed generator (DG) has become an essential and indispensable element from environmental and energy security perspectives. However, installation of DG in distribution systems may cause negative affects on feeders because power outputs of DG could be changed irregularly. One of major negative affects is variation in voltage profile. In general, voltage regulation devices such as under load tap changer (ULTC) at distribution substation and step voltage regulator (SVR) along feeder in distribution system are used to maintain customers' receiving voltage within a predetermined range. These regulators are controlled by line drop compensation (LDC) method which calls for two parameters; the equivalent impedance and the load center voltage. Therefore, consideration of DG outputs in the LDC parameter design procedure may give large impact on the installable DG capacity. This paper proposes a method that estimates maximum Installable DG capacity considering LDC parameters of ULTC and SVR. The proposed algorithm is tested with model network.

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Multilayer Power Delivery Network Design for Reduction of EMI and SSN in High-Speed Microprocessor System

  • Park, Seong-Geun;Kim, Ji-Seong;Yook, Jong-Gwan;Park, Han-Kyu
    • Journal of electromagnetic engineering and science
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    • v.2 no.2
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    • pp.68-74
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    • 2002
  • In this paper, a pre-layout design approach for high-speed microprocessor is proposed. For multilayer PCB stark up configuration as well as selection and placement of decoupling capacitors, an effective solution for reducing SSN and EMI is obtained by modeling and simulation of complete power distribution system. The system model includes VRM, decoupling capacitors, multiple power and ground planes for core voltage, vias, as well as microprocessor. Finally, the simulation results are verified by measurements data.

The Advanced Voltage Regulation Method for ULTC in Distribution Systems with DG

  • Kim, Mi-Young;Song, Yong-Un;Kim, Kyung-Hwa
    • Journal of Electrical Engineering and Technology
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    • v.8 no.4
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    • pp.737-743
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    • 2013
  • The small-scaled onsite generators such as photovoltaic power, wind power, biomass and fuel cell belong to decarbonization techniques. In general, these generators tend to be connected to utility systems, and they are called distributed generations (DGs) compared with conventional centralized power plants. However, DGs may impact on stabilization of utility systems, which gets utility into trouble. In order to reduce utility's burdens (e.g., investment for facilities reinforcement) and accelerate DG introduction, the advanced operation algorithms under the existing utility systems are urgently needed. This paper presents the advanced voltage regulation method in power systems since the sending voltage of voltage regulators has been played a decisive role restricting maximum installable DG capacity (MaxC_DG). For the proposed voltage regulation method, the difference from existing voltage regulation method is explained and the detailed concept is introduced in this paper. MaxC_DG estimation through case studies based on Korean model network verifies the superiority of the proposed method.