• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.8
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• pp.1827-1834
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• 2013

The existing PC-based desktop environment is being changed to a server-based virtual desktop environment due to various advantages such as security, mobility, and upgrade cost reduction. In this paper, a virtual computing lab service system which is applicable to the existing computer lab is designed and implemented using both an open source-based cloud computing platform and hypervisor. In addition, a node power scheduler is proposed in order to reduce power consumption in a server farm. The experimental results show that the power scheduler reduces power consumption considerably over the server farm without the power scheduler.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.10
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• pp.2343-2350
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• 2010

In this paper, new smart switch that can monitor and control the power consumption and standby power in real-time by implementing an embedded web-server is proposed. The proposed switch can perform the following functions: measuring the electric power like commercial smart meter product, monitoring the power consumption in real-time in distant places through wire and wireless devices, and finally controlling ON/OFF of each switch. In addition, it also contains auto power-shutoff functions for standy power, overvoltage and overcurrent just like existing power-saving outlet and mulitap. Finally, the proposed smart switch has lower hardware and power consumption than the existing products and can be commercialized as a small-sized product by using exclusive embedded web-server of its own, rather than using PC for monitoring and remote control.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.25 no.4
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• pp.829-838
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• 2015

As the number of smartphone users have increased, many kinds of malwares have emerged. Unlike existing malwares, spyware can be installed normally after user authentication and agreement according to security policy. For this reason, it is not easy to catch spywares involving harmful functionalities to users by using existing malware detection system. Therefore, our paper focuses on study about detecting mainly wiretapping spywares among them by developing a new wiretapping detection model and application. Specifically, this study conducts to find out power consumption on each application and modular and network consumption to detect voice wiretapping so Open Source Project Power Tutor is used to do this. The risk assessment of wiretapping is measured by gathered all power consumption data from Open Source Project Power Tutor. In addition, developed application in our study can detect at-risk wiretapping spyware through collecting and analyzing data. After we install the application to the smartphone, we collect needed data and measure it.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.257-258
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• 2015

Korean power consumption of the electrical supply problems due to excess demand is repeated every year, the interest in energy increasing social and personal cost has been subject to the number of ways to reduce this cost increases. Automatic doors and automatic door installation market is increasing every year and frequently, when used in general commercial and communal porch consumption based on average 300 times a day power is 70[W] degree is a monthly average usage is about 50.4[KW]. The level can not ignore the power consumption due to switching frequency is large. In this paper, by converting the energy to be discarded in the automatic doors to the inverter and the regenerative energy and to develop control systems for power regeneration to reduce the power consumption by utilizing automatic contact auxiliary power.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.1A
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• pp.104-112
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• 2005

Some design techniques for high speed and low power pipelined 8-bit ADC are described. To perform high-speed operation with relatively low power consumption, open loop architecture is adopted, while closed loop architecture (with MDAC) is used in conventional pipeline ADC. A distributed track and hold amplifier and a cascading structure are also adopted to increase the sampling rate. To reduce the power consumption and the die area, the number of amplifiers in each stage are optimized and reduced with proposed zero-crossing point generation method. At 500-MHz sampling rate, simulation results show that the power consumption is 210mW including digital logic with 1.8V power supply. And the targeted ADC achieves ENOB of about 8-bit with input frequency up to 200-MHz and input range of 1.2Vpp (Differential). The ADC is designed using a $0.18{\mu}m$ 6-Metal 1-Poly CMOS process and occupies an area of $900{\mu}m{\times}500{\mu}m$

• Journal of the Korea Society of Computer and Information
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• v.13 no.7
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• pp.165-172
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• 2008

There are many metrics when designing microprocessors. Especially, energy, power consumption and performance are the most fundamental metrics. Since these metrics are contradictory, microprocessor designers give more weight to some metrics than the other metrics. In this paper, we compare Intel Pentium 4 and Core2 Duo both qualitatively and quantitatively. Furthermore, we provide detailed comparison between Pentium 4 and Core2 Duo when running real benchmarks. Through performance counter of real processors, we calculate energy and power consumption. Performance metric is execution time. In experimental result, Core2 Duo consumes less energy and power. Moreover, performance of Core2 Duo is also better than that of Pentium 4. However, in case of bzip2 which is optimized in Pentium 4, Pentium 4 shows much better performance and lower energy and power consumption than Core2 Duo.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.563-569
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• 2015

For some low-frequency applications such as power-related circuits, NEM relays have been known to show better performance than MOSFETs. For example, in a step-down charge pump circuit, the NEM relays showed much smaller layout area and better energy efficiency than MOSFETs. However, severe process variations of NEM relays hinder them from being widely used in various low-frequency applications. To mitigate the process-variation problems of NEM relays, in this paper, a new NEM-relay charge pump circuit with the self-adjustment is proposed. By self-adjusting a pulse amplitude voltage according to process variations, the power consumption can be saved by 4.6%, compared to the conventional scheme without the self-adjustment. This power saving can also be helpful in improving the power efficiency of the proposed scheme. From the circuit simulation of NEM-relay charge pump circuit, the efficiency of the proposed scheme is improved better by 4.1% than the conventional.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.2
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• pp.104-110
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• 2011

A CMOS Image Sensor (CIS) mounted on mobile appliances requires low power consumption due to limitations of the battery life cycle. In order to reduce the power consumption of CIS, we propose novel power reduction techniques such as a data flip-flop circuit with leakage current elimination and a low power single slope analog-to-digital (A/D) converter with a sleep-mode comparator. Based on 0.13 ${\mu}m$ CMOS process, the chip satisfies QVGA resolution (320 ${\times}$ 240 pixels) that the cell pitch is 2.25 um and the structure is a 4-Tr active pixel sensor. From the experimental results, the performance of the CIS has a 10-b resolution, the operating speed of the CIS is 16 frame/s, and the power dissipation is 25 mW at a 3.3 V(analog)/1.8 V(digital) power supply. When we compare the proposed CIS with conventional ones, the power consumption was reduced by approximately 22% in the sleep mode, and 20% in the active mode.

• The KIPS Transactions:PartA
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• v.14A no.3 s.107
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• pp.147-150
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• 2007

This paper describes a new low-swing inverter for low power consumption. To reduce a power consumption, an output voltage swing is in the range from 0 to VDD-2VTH. This can be done by the inverter structure that allow a full swing or a swing on its input terminal without leakage current. Using this low-swing voltage technology, we proposed a low-power 16$\times$16 bit parallel multiplier. The proposed circuits are designed with Samsung 0.35$\mu$m standard CMOS process at a 3.3V supply voltage. The validity and effectiveness are verified through the HSPICE simulation.. Compared to the previous works, this circuit can reduce the power consumption rate of 17.3% and the power-delay product of 16.5%.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.1
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• pp.114-120
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• 2018

In this paper we implemented an EMG sensor system for wearable devices to obtain and analyze of EMG signals. The performance of the implemented sensor system is evaluated by the correlation analysis of muscle fatigue and muscle activation to clinical EMG system and compared with power consumption of the measured power of our system and commercial systems. In experiments with biceps and triceps brachii of 5 objects, The correlation values of muscle fatigue and muscle activation between our system and the clinical EMG system is 1.1~1.4 and about 1.0, respectively. And also the power consumption of our system is 25~50% less than that of some commercial EMG sensor systems.