• Title/Summary/Keyword: Power Circuit Design

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Design of Subthreshold SRAM Array utilizing Advanced Memory Cell (개선된 메모리 셀을 활용한 문턱전압 이하 스태틱 램 어레이 설계)

  • Kim, Taehoon;Chung, Yeonbae
    • Journal of IKEEE
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    • v.23 no.3
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    • pp.954-961
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    • 2019
  • This paper suggests an advanced 8T SRAM which can operate properly in subthreshold voltage regime. The memory cell consists of symmetric 8 transistors, in which the latch storing data is controlled by a column-wise assistline. During the read, the data storage nodes are temporarily decoupled from the read path, thus eliminating the read disturbance. Additionally, the cell keeps the noise-vulnerable 'low' node close to the ground, thereby improving the dummy-read stability. In the write, the boosted wordline facilitates to change the contents of the memory bit. At 0.4 V supply, the advanced 8T cell achieves 65% higher dummy-read stability and 3.7 times better write-ability compared to the commercialized 8T cell. The proposed cell and circuit techniques have been verified in a 16-kbit SRAM array designed with an industrial 180-nm low-power CMOS process.

Analysis and Design of FRT Detection System Using PMU (PMU를 사용한 FRT 검출시스템 설계 및 분석)

  • Kwon, Dae-Yun;Moon, Chae-Joo;Jeong, Moon-Seon;Yoo, Do-Kyeong
    • The Journal of the Korea institute of electronic communication sciences
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    • v.16 no.4
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    • pp.643-652
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    • 2021
  • Accidents or faults in the transmission and distribution system are never completely avoidable, and short-circuit and earth faults are occurs despite the efforts of the TSO and DSO. Recently, the connection to the transmission and distribution system of large-capacity new and renewable distributed power has increased rapidly and has various effects on the operation of the system. In order to minimize this, connection standards such as FRT (Fault-Ride-Through) have been established to provide wind turbines or solar inverters. In the event of a major faults of the power system, the operation support shall be provided so that the operator can stably operate the system by smoothly performing connection maintenance or rapid system separation. In this paper, in order to appropriately determine whether the FRT condition, which is the grid connection criterion for a representative DERs, is sufficient, a detection system using a PMU (Phasor Measurement Unit) that measures a synchro-phasors was designed and deployment and a system accident due to a generator step-out to analyze and evaluate the proposed system based on the case.

Modeling of Switched Reluctance Motor (SRM) Drive and Control System using Rotor Position Information Sensor (회전자 위치정보 센서를 이용한 Switched Reluctance Motor (SRM)의 구동 및 제어 시스템 Modeling)

  • Jeong, Sungin
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.21 no.3
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    • pp.137-142
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    • 2021
  • In recent years, permanent magnets such as IPM (Interior Permanent Magnet) motors or SPM (Surface Permanent Magnet) motors that can obtain high efficiency and power density by inserting rare earth permanent magnets into the rotor are used. Research on the used electric motor is being actively conducted. Since it uses a permanent magnet, it has the advantage of high efficiency and high power density compared to reluctance motors and induction motors, but by inserting a permanent magnet into the rotor, it operates at high speeds and decreases reliability due to demagnetization of the permanent magnets, and increases the cost of rare earth metals. In this paper, in accordance with the development of future technology that can replace rare-earth permanent magnet motors and technological preoccupation of rare-earth reduction type motors and de-rare-earth motors, switched reluctance motors that do not require permanent magnets (Switched Reluvtance Motors) Motor, SRM) to drive driving control. Using the 3-phase SRM library provided by the PSIM simulation program, we will study the driving and control system modeling of SRM using the rotor position information sensor.

FPGA integrated IEEE 802.15.4 ZigBee wireless sensor nodes performance for industrial plant monitoring and automation

  • Ompal, Ompal;Mishra, Vishnu Mohan;Kumar, Adesh
    • Nuclear Engineering and Technology
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    • v.54 no.7
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    • pp.2444-2452
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    • 2022
  • The field-programmable gate array (FPGA) is gaining popularity in industrial automation such as nuclear power plant instrumentation and control (I&C) systems due to the benefits of having non-existence of operating system, minimum software errors, and minimum common reason failures. Separate functions can be processed individually and in parallel on the same integrated circuit using FPGAs in comparison to the conventional microprocessor-based systems used in any plant operations. The use of FPGAs offers the potential to minimize complexity and the accompanying difficulty of securing regulatory approval, as well as provide superior protection against obsolescence. Wireless sensor networks (WSNs) are a new technology for acquiring and processing plant data wirelessly in which sensor nodes are configured for real-time signal processing, data acquisition, and monitoring. ZigBee (IEEE 802.15.4) is an open worldwide standard for minimum power, low-cost machine-to-machine (M2M), and internet of things (IoT) enabled wireless network communication. It is always a challenge to follow the specific topology when different Zigbee nodes are placed in a large network such as a plant. The research article focuses on the hardware chip design of different topological structures supported by ZigBee that can be used for monitoring and controlling the different operations of the plant and evaluates the performance in Vitex-5 FPGA hardware. The research work presents a strategy for configuring FPGA with ZigBee sensor nodes when communicating in a large area such as an industrial plant for real-time monitoring.

Design and Fabrication of an LPVT Embedded in a GIS Spacer (GIS 스페이서 내장형 저전력 측정용 변압기의 설계 및 제작)

  • Seung-Gwan Park;Gyeong-Yeol Lee;Nam-Hoon Kim;Cheol-Hwan Kim;Gyung-Suk Kil
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.37 no.2
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    • pp.175-181
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    • 2024
  • In electrical power substations, bulky iron-core potential transformers (PTs) are installed in a tank of gas-insulated switchgear (GIS) to measure system voltages. This paper proposed a low-power voltage transformer (LPVT) that can replace the conventional iron-core PTs in response to the demand for the digitalization of substations. The prototype LPVT consists of a capacitive voltage divider (CVD) which is embedded in a spacer and an impedance matching circuit using passive components. The CVD was fabricated with a flexible PCB to acquire enough insulation performance and withstand vibration and shock during operation. The performance of the LPVT was evaluated at 80%, 100%, and 120% of the rated voltage (38.1 kV) according to IEC 61869-11. An accuracy correction algorithm based on LabVIEW was applied to correct the voltage ratio and phase error. The corrected voltage ratio and phase error were +0.134% and +0.079 min., respectively, which satisfies the accuracy CL 0.2. In addition, the voltage ratio of LPVT was analyzed in ranges of -40~+40℃, and a temperature correction coefficient was applied to maintain the accuracy CL 0.2. By applying the LPVT proposed in this paper to the same rating GIS, it can be reduced the length per GIS bay by 11%, and the amount of SF6 by 5~7%.

System Diagnosis and MEMS Driving Circuits Design using Low Power Sensors (저 전력 센서를 이용한 MEMS 회로의 구현과 시스템 효율의 진단)

  • Kim, Tae-Wan;Ko, Soo-Eun;Jabbar, Hamid;Lee, Jong-Min;Choi, Sung-Soo;Lee, Jang-Ho;Jeong, Tai-Kyeong
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.45 no.1
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    • pp.41-49
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    • 2008
  • Many machineries and equipments are being changing to various and complicated by development of recent technology and arrival of convergence age in distant future. These various and complicate equipments need more precise outcomes and low-power consumption sensors to get close and exact results. In this paper, we proposed fault tolerance and feedback theorem for sensor network and MEMS circuit which has a benefit of energy efficiency through wireless sensor network. The system is provided with independent sensor communication if possible as unused action, using idle condition of system and is proposed the least number of circuits. These technologies compared system efficiency after examining product of each Moving Distance by developed sensor which gives effects to execution of system witch is reduced things like control of management side and requirement for hardware, time, and interaction problems. This system is designed for practical application; however, it can be applied to a normal life and production environment such as "Ubiquitous City", "Factory Automata ion Process", and "Real-time Operating System", etc.

Design of 77 GHz Automotive Radar System (77 GHz 차량용 레이더 시스템 설계)

  • Nam, Hyeong-Ki;Kang, Hyun-Sang;Song, Ui-Jong;Cui, Chenglin;Kim, Seong-Kyun;Nam, Sang-Wook;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.9
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    • pp.936-943
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    • 2013
  • This work presents the design and measured results of the single channel automotive radar system for 76.5~77 GHz long range FMCW radar applications. The transmitter uses a commercial GaAs monolithic microwave integrated circuit(MMIC) and the receiver uses the down converter designed using 65 nm CMOS process. The output power of the transmitter is 10 dBm. The down converter chip can operate at low LO power as -8 dBm which is easily supplied from the transmitter output using a coupled line coupler. All MMICs are mounted on an aluminum jig which embeds the WR-10 waveguide. A microstrip to waveguide transition is designed to feed the embedded waveguide and finally high gain horn antennas. The overall size of the fabricated radar system is $80mm{\times}61mm{\times}21mm$. The radar system achieved an output power of 10 dBm, phase noise of -94 dBc/Hz at 1 MHz offset and a conversion gain of 12 dB.

Design and fabrication of a 300A class general-purpose current sensor (300A급 일반 산업용 전류센서의 설계 및 제작)

  • Park, Ju-Gyeong;Cha, Guee-Soo;Ku, Myung-Hwan
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.6
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    • pp.1-8
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    • 2016
  • Current sensors are used widely in the fields of current control, monitoring, and measuring. They have become more popular with the increasing demand for smart grids in a power network, generation of renewable energy, electric cars, and hybrid cars. Although open loop Hall effect current sensors have merits, such as low cost, small size, and weight, they have low accuracy. This paper describes the design and fabrication of a 300A open loop current sensor that has high accuracy and temperature performance. The core of the current sensor was calculated numerically and the signal conditioning circuits were designed using circuit analysis software. The characteristics of the manufactured open loop current sensor of 300 A class was measured at currents up to 300 A. According to the test of the current sensor, the accuracy error and linearity error were 0.75% and 0.19%, respectively. When the temperature compensation was carried out with the relevant circuit, the temperature coefficients were less than $0.012%/^{\circ}C$ at temperatures between $-25^{\circ}C$ and $85^{\circ}C$.

The Design of SCR-based Whole-Chip ESD Protection with Dual-Direction and High Holding Voltage (양 방향성과 높은 홀딩전압을 갖는 사이리스터 기반 Whole-Chip ESD 보호회로)

  • Song, Bo-Bae;Han, Jung-Woo;Nam, Jong-Ho;Choi, Yong-Nam;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.17 no.3
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    • pp.378-384
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    • 2013
  • We have investigated the electrical characteristics of SCR(Silicon Controlled Rectifier)-based ESD power clamp circuit with high holding voltage and dual-directional ESD protection cells for a whole-chip ESD protection. The measurement results indicate that the dimension of n/p-well and p-drift has a great effect on holding voltage (2V-5V). Also A dual-directional ESD protection circuit is designed for I/O ESD protection application. The trigger voltage and the holding voltage are measured to 5V and 3V respectively. In comparison with typical ESD protection schemes for whole-chip ESD protection, this ESD protection device can provide an effective protection for ICs against ESD pulses in the two opposite directions, so this design scheme for whole-chip ESD protection can be discharged in ESD-stress mode (PD, ND, PS, NS) as well as VDD-VSS mode. Finally, a whole-chip ESD protection can be applied to 2.5~3.3V VDD applications. The robustness of the novel ESD protection cells are measured to HBM 8kV and MM 400V.

Design of a Spread Spectrum Clock Generator for DisplayPort (DisplayPort적용을 위한 대역 확산 클록 발생기 설계)

  • Lee, Hyun-Chul;Kim, Tae-Ho;Lee, Seung-Won;Kang, Jin-Ku
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.7
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    • pp.68-73
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    • 2009
  • This paper describes design and implementation of a spread spectrum clock generator (SSCG) for the DisplayPort. The proposed architecture generates the spread spectrum clock using a sigma-delta fractional-N PLL. The SSCG uses a digital End order MASH 1-1 sigma-delta modulator and a 9bit Up/Dn counter. By using MASH 1-1 sigma-delta modulator, complexity of circuit and chip area can be reduced. The advantage of sigma-delta modulator is the better control over modulation frequency and spread ratio. The SSCG generates dual clock rates which are 270MHz and 162MHz with 0.25% down-spreading and triangular waveform frequency modulation of 33kHz. The peak power reduction is 11.1dBm at 270MHz. The circuit has been designed and fabricated using in 0.18$\mu$m CMOS technology. The chip occupies 0.620mm$\times$0.780mm. The measurement results show that the fabricated chip satisfies the DispalyPort standard.