• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.40 no.7
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• pp.623-628
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• 2012

Mission Equipment Package(MEP) system is a collection of avionic components that are integrated to perform the mission of the Korean Utility Helicopter(KUH). Built In Test(BIT) reduces the need for skilled personnel and special test equipment, and reduces maintenance down-time of system. The increasing complexity of avionics equipments has resulted in an increased need to provide BIT functions. This paper describe the development and verification for the KUH MEP system BIT.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.3
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• pp.193-198
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• 2017

This paper discusses the design and control of a switched reluctance motor (SRM) drive system for a built-in car vacuum cleaner. The growing popularity of outdoor activities and recreation has led the automobile industry to expand technologies that increase the convenience of vehicles, and thus, a built-in car vacuum cleaner was introduced. However, the existing DC motor of a vacuum cleaning system has several disadvantages, such as maintenance cost and lifespan issues of its commutator-brush structure. An SRM can be a good alternative to the existing DC motor because of its high-speed capability, long lifespan, low maintenance cost, and high efficiency, among other advantages. A prototype SRM drive is designed and manufactured to verify its feasibility for use in a built-in car vacuum cleaning system. Dynamic simulation is conducted to determine the optimal switching angle for maximum efficiency and minimum torque ripple. Load test, noise measurement, and suction-power tests are also carried out.

• Journal of the Korean Society of Safety
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• v.28 no.3
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• pp.51-55
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• 2013

The purpose of this study is to find the causes of malfunctions and defective operation of printed circuit boards(PCBs) built into home refrigerators to perform power saving functions. This study performed an electrostatic test of a PCB built-in using an Auto Triggering system; lightning and impulse tests using an LSS-15AX; and an impulse test using an INS-400AX. From the analysis of a secondarily developed product, it was found that electrostatic discharge(ESD) caused more malfunctions and defective operations than electric overstress(EOS) due to overvoltage. As a result of increasing the condenser capacity of the PCB circuit, withstanding voltage was increased to 7.4 kV. In addition, this study changed the power saving mode and connected a varistor to the #2 pin of an IC chip. As a result, the system consisting of all specimens of a finally developed product was operated stably with an applied voltage of less than 10 kV. This study found it necessary to perform quality control at the manufacturing stage in order to reduce the occurrence of electrostatic accidents to IC chips built into a PCB.

• Journal of Korea Multimedia Society
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• v.10 no.10
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• pp.1260-1270
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• 2007

Testing and diagnosis of analog circuits(or mixed-signal circuits) continue to be a hard task for test engineers and efficient test methodologies to solve these problems are needed. This paper proposes a novel analog circuits test technique using time slot specification (TSS) based built-in current sensors (BICS). A technique for location of a fault site and separation of fault type based on TSS is also presented. The proposed built-in current sensors and TSS technique has high testability, fault coverage and a capability to diagnose catastrophic faults and parametric faults in analog circuits. In order to reduce time complexity of test point insertion procedure, external output and power nodes are used for test points and the current sensors are implemented in the automatic test equipment(ATE). The digital output of BICS can be easily combined with built-in digital test modules for analog IC test.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.43-48
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• 2008

Power consumption during test can be much higher than that during normal operation since test vectors are determined independently. In order to reduce the power consumption during test process, a new BIST(Built-In Self Test) architecture is proposed. In the proposed architecture, test vectors generated by an LFSR(Linear Feedback Shift Resister) are transformed into the new patterns with low transitions using Bit Generator and Bit Dropper. Experiments performed on ISCAS'89 benchmark circuits show that transition reduction during scan testing can be achieved by 62% without loss of fault coverage. Therefore the new architecture is a viable solution for reducing both peak and average power consumption.

• Corrosion Science and Technology
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• v.8 no.2
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• pp.68-73
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• 2009

An evaluation of underwater - repair coating materials was based on the premise that defective areas of the existent epoxy coating such as blistering and cracking will be repaired on spot under submerged condition. Tests include the clarification as to whether they are compatible between as-built coating and new repair coating on each concrete specimen. Candidate coating materials for repair were tested in a laboratory to scrutinize their suitability to perform the needed function satisfactorily. The qualification tests performed are as a minimum as follows: Integrated radiation tolerance test, chemical resistance test (submerged condition in deionized water), hardness test and adhesion test of the repair materials. The proper repair coating materials were selected and approved from this test results.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.125-128
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• 2001

In this paper, we propose a low power Scan-based Built-ln Self Test based on circuit partitioning and pattern suppression using modified test control unit. To partition a CUT(Circuit Under Testing), the MHPA(Multilevel Hypergraph Partition Algorithm) is used. As a result of circuit partition, we can reduce the total length of test pattern, so that power consumptions are decreased in test mode. Also, proposed Scan-based BIST architecture suppresses a redundant test pattern by inserting an additional decoder in BIST control unit. A decoder detects test pattern with high fault coverage, and applies it to partitioned circuits. Experimental result on the ISCAS benchmark circuits shows the efficiency of proposed low power BIST architecture.

• Journal of Industrial Technology
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• v.24 no.A
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• pp.83-90
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• 2004

Generally, electronic appliances are used on the basis of normal power source supply. The power source inevitably includes the abnormal condition, such as, sudden voltage sagging, power interrupt, and induced noises. As the electronic appliances which include micro-controller-based circuits are being increased recently, the controller circuit sometimes malfunctions by the abnormal condition of the power source. This situation causes serious problems such as hitch of electric appliance, fire and medical instrument glitch, which produces serious situations. In this paper, development of power interrupt tester which is highly suitable for an endurance test device under abnormal power source to microprocessor-based circuits is proposed 89C2051 microcontroller is performed to make power interrupt signal, and software controls peripheral hardwares and built-in functions. Experimental results of this study will offer a good application to electronic appliance maker as a test device of hardware and software debugging use.

• Proceedings of the KIEE Conference
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• 2005.10c
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• pp.158-161
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• 2005

For low power motor control, there are increasing demands for compactness, cost effective and built in many functions. Hence Intelligent Power Module(IPM) is considered as an important technology in inverter-driven motor applications. Regarding BID-IPM(Built In DC/DC converter, Intelligent Power Module) newly developed to integrate NPT-IGBT, HVIC and Flyback converter in a compact package, this paper discussed design of BID-IPM and presented the experimental results by using signal source board and equivalent load test board.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.962-964
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• 2003

In this paper, development of portable power interrupt tester to evaluate microprocessor based control circuits for an endurance under abnormal power source. 89C2051 micro-controller is performed to make power interrupt signal, and software controls peripheral hardwares and built-in functions. Experimental results of this study will offer a good application to electronic appliance maker as a test device of hardware and software debugging use.