• Journal of Magnetics
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• 제19권3호
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• pp.227-231
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• 2014

We fabricated textured polycrystalline $CoFe_2O_4$ thin films on $Pt(111)/TiO_2/SiO_2/Si$ substrate through a sol-gel method. We varied the thickness of the films, by using precursor solutions with different concentrations of 0.1, 0.2, and 0.3 M, and by depositing 5, 8, or 10 layers on the substrate by spin-coating. X-ray diffraction spectra indicated that when the precursor concentration of the solution was higher than 0.1 M, the spin-coated films were preferentially oriented in the <111> direction. Inspection of the surface morphology by scanning electron microscopy revealed that $CoFe_2O_4$ thin films prepared with 0.2 M solution and 5-time spin-coatings had smoother surface, as compared to the other conditions. Each coating had an average thickness of about 50 nm. The magnetic properties measured by vibrating sample magnetometer showed magnetic anisotropy, as evidenced from the difference in the in-plane and out-of-plane hysteresis loops, which we attributed to the textured orientation of the $CoFe_2O_4$ thin films.

• Proceedings of the KIEE Conference
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• 대한전기학회 1996년도 하계학술대회 논문집 C
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• pp.1582-1584
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• 1996

The polycrystalline silicon thin film transistors (poly-Si TFT) are the most promising candidate for active matrix liquid crystal displays (AMLCD) for their high mobilities and current driving capabilities. The leakage current of the poly-Si TFT is much higher than that of the amorphous-Si TFT, thus larger storage capacitance is required which reduces the aperture ratio fur the pixel. The offset gated poly-Si TFTs have been widely investigated in order to reduce the leakage current. The conventional method for fabricating an offset device may require additional mask and photolithography process step, which is inapplicable for self-aligned source/drain ion implantation and rather cost inefficient. Due to mis-alignment, offset devices show asymmetric transfer characteristics as the source and drain are switched. We have proposed and fabricated a new offset poly-Si TFT by applying photoresist reflow process. The new method does not require an additional mask step and self-aligned ion implantation is applied, thus precise offset length can be defined and source/drain symmetric transfer characteristics are achieved.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.3-6
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• 2009

Aluminum nitride (AIN) thin films were deposited on a polycrystalline 3C-SiC intermediate layer by a pulsed reactive magnetron sputtering system. Characteristics of the AIN/SiC heterostructures were investigated by field emission scanning electron microscopy (FE-SEM), atomic force microscopy (AFM), X-ray diffraction (XRD), and Fourier transform infrared spectroscopy (FT-IR). The columnar structure of AIN thin films was observed by FE-SEM. The surface roughness of AlN films on the 3C-SiC buffer layer was measured using AFM. The XRD pattern of AlN films on SiC buffer layers was highly oriented at (002). Full width at half maximum (FWHM) of the rocking curve near (002) reflections was $1.3^{\circ}$. The infrared absorbance spectrum indicated that the residual stress of AIN thin films grown on SiC buffer layers was nearly negligible. The 3C-SiC intermediate layers are promising for the realization of nitride based electronic and mechanical devices.

• Proceedings of the Korean Vacuum Society Conference
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.287.1-287.1
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• 2014

본 연구에서는 현재 디스플레이에서 가장 널리 이용되는 저온 polycrystalline silicon (poly-Si)의 결정화 방법에 따른 thin-film transistor (TFT)의 전기적 특성을 분석하였다. 분석에 이용된 결정화 방식은 Excimer Laser Annealing (ELA)와 Metal Induced Crystallization (MIC)이다. ELA와 MIC TFTs의 전기적 특성 측정을 통한 분석결과 ELA와 MIC poly-Si TFTs의 전기적 특성 [field-effect mobility (${\mu}_{FE}$), on/off current ratio ($I_{ON}/I_{OFF}$), sub-threshold swing (SS)]은 큰 차이는 없지만, ELA를 이용한 poly-Si TFT의 전기적 특성이 조금 우수하다. 하지만, MIC poly-Si TFT의 경우 threshold voltage ($V_{TH}$)가 0V에 보다 가까울 뿐만 아니라, 전기적 스트레스를 통한 신뢰성 확인 시 ELA poly-Si TFT보다 조금 더 안정적이다. 이는 ELA의 경우 좁은 면에 선형 레이저 빔으로 조사하면서 생기는 hill-lock의 영향으로 표면이 거칠고 균일하지 못하여 바이어스 인가시 생기는 문제이다. 또한 MIC는 금속 촉매를 이용해 결정립 경계를 확장하고 결정 크기를 키워 대면적화에 유리하다. Thermal Stress에서는 (from 293K to 373K) TFT에 점차 높은 온도를 가하자 MIC poly-Si TFT의 경우 off 상태에서 누설 전류 값이 증가하며 열에 민감한 반응을 보이는 것을 확인하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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• pp.46-49
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• 2002

Recent trends of low-temperature polycrystalline Si (LTPS) TFT technologies are presented. Characteristics of LTPS TFT processes are compared with those of a-Si TFT's. In order to compete with well-established a-Si TFT-LCD technology, LTPS process has to be as simple as possible. One of the most critical processes, recrystallization of a-Si thin films, could be the process for the differentiation of LTPS technology. Along with these technical reviews, a recent development of the 5.0-inch LTPS TFT-LCD is presented. In order to achieve high-performance display characteristics and save the power consumption, the transflective mode is adopted. The 5.0-inch display with 186 pixel-per-inch, high-resolution LCD was measured to be 10% for the reflectance and 70:1 for the contrast ratio. This display is designed for a high information content hand-held PC (HHPC) application.

• Journal of Korean Vacuum Science & Technology
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• 제3권1호
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• pp.33-37
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• 1999

We present, for the first time, a prototype active-matrix field emission display (AMFED) with 25$\times$25 pixels in which polycrystalline silicon fie이 emitter array (poly-Si FEA) and thin-film transistor (TFT) were monolityically intergrated on an insulating substrate. The FEAs showed relatively large electron emissions above at a gate voltage of 50 V, and the TFTs were designed to have low off-stage currents even though at high drain voltages. The intergrated poly-Si TFT controlled electron emissions of the poly-Si FEA actively, resulting in improvement in the emission stability and reliability along with a low-voltage control of field emission below 25V. With the prototype AMFED we have displayed character patterns by low-boltage pertipheral circuits of 15 V in a high vacuum chamber.

• The Korean Journal of Ceramics
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• 제4권4호
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• pp.382-386
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• 1998

titanate and a silicon carbide/zirconium diboride particulate composite have each been blended with thermoplastic of aqueous binders and extruded. The green extrudates have diameters ranging between 50 and 150 ㎛ and polyethylene-base 150 ${\mu}m$ diameter fibers can be drawn down at elevated temperature to approximately 40 ${\mu}m$ diameter. Hollow fibers with 150${\mu}m$ outer and 90 ${\mu}m$ inner diameter can also be fabricated. Green fibers have been processed into chopped fiber felts for use as gas distributors/current collectors in an experimental solid oxide fuel cell (SOFC) and the first attempts at producing simple textile structures have been successful. The fibers, tubes and felts have been successfully debound and sintered and characterization of the sintered PSZ fibers, for example, has revealed a density in excess of 99% and tensile failure stresses up to 1.0 GPa for 78 ${\mu}m$ diameter fibers.

• Electrical & Electronic Materials
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• 제11권11호
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• pp.22-27
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• 1998

We have investigated the effect of an ion shower doping of the laser annealed poly-Si films at an elevated substrate temperatures. The substrate temperature was varied from room temperature to 300$^{\circ}C$ when the poly-Si film was doped with phosphorus by a non-mass-separated ion shower. Optical, structural, and electrical characterizations have been performed in order to study the effect of the ion showering doping. The sheet resistance of the doped poly-Si films was decreased from7${\times}$106 $\Omega$/$\square$ to 700 $\Omega$/$\square$ when the substrate temperature was increased from room temperature to 300$^{\circ}C$. This low sheet resistance is due to the fact that the doped film doesn't become amorphous but remains in the polycrystalline phase. The mildly elevated substrate temperature appears to reduce ion damages incurred in poly-Si films during ion-shower doping. Using the ion-shower doping at 250$^{\circ}C$, the field effect mobility of 120 $\textrm{cm}^2$/(v$.$s) has been obtained for the n-channel poly-Si TFTs.

• Journal of the Korean Ceramic Society
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• 제32권7호
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• pp.809-816
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• 1995

Ti1-xAlxN films were successfully deposited on high speed steel and silicon wafer by plasma-assisted chemical vapor deposition using a TiCl4/AlCl3/N2/Ar/H2 gas mixture. Plasma process enabled N2 gas to nitride AlCl3, which is not possible in sense of thermodynamics. XPS analyses revealed that the deposited layer contained Al-N bond as well as Ti-N bond. Ti1-xAlxN films were polycrystalline and had single phase, B1-NaCl structure of TiN. Interplanar distance, d200, of (200) crystal plane of Ti1-xAlxN was, however, decreased with Al content, x. Al incorporation into TiN caused the grain size to be finer and changed strong (200) preferred orientation of TiN to random oriented microstructure. Those microstructural changes with Al addition resulted in the increase of micro-hardness of Ti1-xAlxN film up to 2800Kg/$\textrm{mm}^2$ compared with 1400Kg/$\textrm{mm}^2$ of TiN.

• Korean Journal of Materials Research
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• 제17권2호
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• pp.115-120
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• 2007

Polycrystalline silicon (poly-Si) thin film transistors (TFTs) might be fabricated on the mica substrate and transferred to a flexible plastic substrate because mica can be easily cleaved into a thin layer. To overcome the adhesion and stress problem between poly-Si film and mica substrate, a buffer layer consisting of $SiO_x/Ta/Ti$ three layers has been developed. The $SiO_x$ layer is for electrical isolation, the Ti layer is for adhesion of $SiO_{x}$ and mica. and Ta is for stress relief between $SiO_x$ and Ti. A TFT was fabricated on the mica substrate by a conventional Si process and was successfully transferred to a plastic substrate.