• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.175-175
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• 2010

The etching characteristics with etch rate of ITO thin films in an $O_2/BCl_3$/Ar plasma were investigated. The etch rate of ITO thin films increased with increasing $O_2$ content from 0 to 10 % in $BCl_3$/Ar plasma, whereas that of ITO decreased with increasing $O_2$ content from 10 % to 30 % in $BCl_3$/Ar plasma. The maximum etch rate of 65.9 nm/min for the ITO thin films was obtained at 10 % $O_2$ addition. The etch conditions were the RF power of 500 W, bias power of 200 W, and process pressure of 2 Pa. The analysis of x-ray photoelectron spectroscopy (XPS) was carried out to investigate the chemical reactions between the surfaces of ITO thin films and etch species.

• Korean Chemical Engineering Research
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• 제47권1호
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• pp.79-83
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• 2009

In this study, the characteristics of amorphous silicon etching for the formation of gate electrodes have been evaluated at the variation of several process parameters. When total flow rates composed of $Cl_2/HBr/O_2$ gas mixtures increased, the etch rate of amorphous silicon layer increased, but critical dimension (CD) bias was not notably changed regardless of total flow rate. As the amount of HBr in the mixture gas became larger, amorphous silicon etch rate was reduced by the low reactivity of Br species. In the case of increasing oxygen flow rate, etch selectivity was increased due to the reduction of oxide etch rate, enhancing the stability of silicon gate etching process. However, gate electrodes became more sloped according to the increase of oxygen flow rate. Higher source power induced the increase of amorphous silicon etch rate and CD bias, and higher bias power had a tendency to increase the etch rate of amorphous silicon and oxide.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.164-165
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• 2005

The dry etch characteristics of GaAs over both AlGaAs and InGaP in planar inductively coupled $BCl_3$-based plasmas(ICP) with additions of $SF_6$ or $CF_4$ were studied. The additions of flourine gases provided enhanced etch selectivities of GaAs/AlGaAs and GaAs/InGaP. The etch stop reaction involving formation of involatile $AlF_3$ and $InF_3$ (boiling points of etch products: $AlF_3\sim1300^{\circ}C$, $InF_3$ > $1200^{\circ}C$ at atmosphere) were found to be effective under high density inductively coupled plasma condition. Decrease of etch rates of all materials was probably due to strong increase of flourine atoms in the discharge, which blocked the surface of the material against chlorine neutral adsorption. The process parameters were ICP source power (0 - 500 W), RF chuck power (0 - 30 W) and variable gas composition. The process results were characterized in terms of etch rate, selectivities of GaAs over AlGaAs and InGaP, surface morphology, surface roughness and residues after etching.

• Korean Journal of Materials Research
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• 제14권1호
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• pp.46-51
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• 2004

The annealing of a Cu(4.5at.% Mg)/$SiO_2$/Si structure in ambient $O_2$, at 10 mTorr, and $300-500^{\circ}C$, allows for the outdiffusion of the Mg to the Cu surface, forming a thin MgO (15 nm) layer on the surface. The surface MgO layer was patterned, and successfully served as a hard mask, for the subsequent dry etching of the underlying Mg-depleted Cu films using an $O_2$ plasma and hexafluoroacetylacetone [H(hfac)] chemistry. The resultant MgO/Cu structure, with a taper slope of about $30^{\circ}C$ shows the feasibility of the dry etching of Cu(Mg) alloy films using a surface MgO mask scheme. A dry-etched Cu(4.5at.% Mg) gate a-Si:H TFT has a field effect mobility of 0.86 $\textrm{cm}^2$/Vs, a subthreshold swing of 1.08 V/dec, and a threshold voltage of 5.7 V. A novel process for the dry etching of Cu(Mg) alloy films, which eliminates the use of a hard mask, such as Ti, and results in a reduction in the process steps is reported for the first time in this work.

• Journal of the Korean Vacuum Society
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• 제19권4호
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• pp.314-318
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• 2010

We fabricated a plasma texturing for multi-crystalline silicon cells using reactive ion etching (RIE). Multi-crystalline Si cells have not benefited from the cost-effective wet-chemical texturing processes that reduce front surface reflectance on single-crystal wafers. Elimination of plasma damage has been achieved while keeping front reflectance to extremely low levels. We will discuss reflectance, quantum efficiency and conversion efficiency for multi-crystalline Si solar cell by each RIE process conditions.

• Proceedings of the KIEE Conference
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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• pp.1384-1385
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• 2006

Platinum is a candidate of top and bottom electrode in ferroelectric random access memory and dynamic random access memory. High dielectric materials and ferroelectric materials were generally patterned by plasma etching, however, the low etch rate and low etching profile were repoted. We proposed the damascene process of high dielectric materials and ferroelectric materials for patterning process through the chemical mechanical polishing process. At this time, platinum as a top electrode was used for the stopper for the end-point detection as Igarashi model. Therefore, the control of removal rate in platinum chemical mechanical polishing process was required. In this study, an addition of $H_{2}O_{2}$ oxidizer to alumina slurry could control the removal rate of platinum. The removal rate of platinum rapidly increased with an addition of 10wt% $H_{2}O_{2}$ oxidizer from 24.81nm/min to 113.59nm/min. Within-wafer non-uniformity of platinum after chemical mechanical polishing process was 9.93% with an addition of 5wt% $H_{2}O_{2}$ oxidizer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.236-236
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• 2008

(Bi,La)$Ti_3O_{12}$(BLT) thin film is one of the most attractive materials for ferroelectric random access memory (FRAM) applications due to its some excellent properties such as high fatigue endurance, low processing temperature, and large remanent polarization [1-2]. The authors firstly investigated and reported the damascene process of chemical mechanical polishing (CMP) for BLT thin film capacitor on behalf of plasma etching process for fabrication of FRAM [3]. CMP process could prepare the BLT capacitors with the superior process efficiency to the plasma etching process without the well-known problems such as plasma damages and sloped sidewall, which was enough to apply to the fabrication of FRAM [2]. BLT-CMP characteristics showed the typical oxide-CMP characteristics which were related in both pressure and velocity according to Preston's equation and Hernandez's power law [2-4]. Good surface roughness was also obtained for the densification of multilevel memory structure by CMP process [3]. The well prepared BLT capacitors fabricated by CMP process should have the sufficient ferroelectric properties for FRAM; therefore, in this study the electrical properties of the BLT capacitor fabricated by CMP process were analyzed with the process parameters. Especially, the effects of CMP pressure, which had mainly affected the removal rate of BLT thin films [2], on the electrical properties were investigated. In order to check the influences of the pressure in eMP process on the ferroelectric properties of BLT thin films, the electrical test of the BLT capacitors was performed. The polarization-voltage (P-V) characteristics show a decreased the remanent polarization (Pr) value when CMP process was performed with the high pressure. The shape of the hysteresis loop is close to typical loop of BLT thin films in case of the specimen after CMP process with the pressures of 4.9 kPa; however, the shape of the hysteresis loop is not saturated due to high leakage current caused by structural and/or chemical damages in case of the specimen after CMP process with the pressures of 29.4 kPa. The leakage current density obtained with positive bias is one order lower than that with negative bias in case of 29.4 kPa, which was one or two order higher than in case of 4.9 kPa. The high pressure condition was not suitable for the damascene process of BLT thin films due to the defects in electrical properties although the better efficiency of process. by higher removal rate of BLT thin films was obtained with the high pressure of 29.4 kPa in the previous study [2].

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• 제14권7호
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• pp.551-556
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• 2001

In this work, the recovery of etching damage in the etched PZT thin film with $O_2$ annealing has been studied. The PZT thin films were etched as a function of Cl$_2$/Ar and additive CF$_4$ into Cl$_2$(80%) /Ar(20%). the etch rates of PZT thin films were 1600$\AA$/min at Cl$_2$(80%)/Ar(20%) and 1970 $\AA$/min at 30% additive Cf$_4$ into Cl$_2$(80%)/Ar(20%). In order to recover the characteristics of etched PZT thin films, the etched PZT thin films were annealed in $O_2$ atmosphere at various temperatures. From the hysteresis curves, ferroelectrical properties are improved by $O_2$ annealing process. The improvement of ferroelectric behavior is consistent with the increase of the (100) and (200) PZT phase revealed by x-ray diffraction (XRD). From x-ray photoelectron spectroscopy (XPS) analysis, intensities of Pb-O, Zr-O and Ti-O peak increase and the chemical residue peak is reduced by $O_2$ annealing. From the atomic force microscopy (AFM) images. it shows that the surface morphology of re-annealed PZT thin films after etching is improved.

• Applied Chemistry for Engineering
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• 제25권1호
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• pp.53-57
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• 2014

We describe the preparation of highly-ordered etching pits on the Nb foil through a micromachining. The effects of electrochemical polishing on the formation of uniformly-patterned protective epoxy layer was investigated. Unlike the previous process using $O_2$ plasma, well-ordered etched pits were prepared without any dry processes. As a result, the Nb foil with the well-ordered pits of $10{\mu}m{\times}5{\mu}m$ could be obtained by electrochemical etching in methanolic electrolytes for 10 min.

• Proceedings of the KIEE Conference
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• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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• pp.105-106
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• 2006

The ferroelectric materials of the PZT, SBT attracted much attention for application to ferroelectric random access memory (FRAM) devices. Through the last decade, the lead zirconate titanate (PZT) is one of the most attractive perovskite-type materials for the ferroelectric products due to its higher remanant polarization and the ability to withstand higher coercive fields. FRAM has been currently receiving increasing attention for one of future memory devices due to its ideal memory properties such as non-volatility, high charge storage, and faster switching operations. In this study, we first applied the damascene process using chemical mechanical polishing (CMP) to the fabricate the $Pb_{1.1}(Zr_{0.52}Ti_{0.48})O_3$ thin film capacitor in order to solve the problems of plasma etching such as low etching profile and ion charging. The structural characteristics were compared with specimens before and after CMP process of PZT films. The scanning electron microscopy (SEM) analysis was performed to compare the morphology surface characteristics of $Pb_{1.1}(Zr_{0.52}Ti_{0.48})O_3$ capacitors. The densification by the vertical sidewall patterning and charging-free ferroelectric capacitor could be obtained by the damascene process without remarkable difference of the characteristics.