• Title/Summary/Keyword: Pitch Array

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A study on 3 Dimensional Tactile Display(I). (3차원 촉각 디스플레이에 관한 연구(I))

  • Choi, T.J.;Kim, H.K.;Kim, J.K.;Hur, W.
    • Proceedings of the IEEK Conference
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    • 2001.06e
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    • pp.93-96
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    • 2001
  • Tactile display devices use an array of pins mounted in the form of a matrix to present three-dimensional shapes to the user by raising and lowering. With a denser matrix of mounted pins, it can be expected that shape identification will be become easier and the time required for identification will also become shorter, but that problems of difficulty in fabrication will arise. It is necessary to consider such trade-offs in the development of such devices. This study conducted experiments to study the effect of pin pitch on shape identification as Part of the fundamental investigation of this subject. The experiment used three tactile display devices with pin pitches of In, 2mm and 3mm for geometrical shape identification, with response time and rate of misidentification taken as the performance data. Surfaces, edgs and vertices of three-dimensional shapes were used as the shape primitives for displayed shapes and several of each type were selected for presentation. The results obtained revealed that performance has different relationships to pin pitch with different shape primitives.

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Fatigue Life Optimization of Spot Welding Nuggets Considering Vibration Mode of Vehicle Subframe (서브프레임의 진동모드를 고려한 점용접 너깃의 피로수명 최적설계)

  • Lee, Sang-Beom;Lee, Hyuk-Jae
    • The Journal of the Acoustical Society of Korea
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    • v.28 no.7
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    • pp.646-652
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    • 2009
  • In this paper, welding pitch optimization technique of vehicle subframe is presented considering the fatigue life of spot welding nuggets. Fatigue life of spot welding nuggets is estimated by using the frequency-domain fatigue analysis technique. The input data, which are used in the fatigue analysis, are obtained by performing the dynamic analysis of vehicle model passing through the Belgian road profile and also the modal frequency response analysis of finite element model of vehicle subframe. According to the fatigue life result obtained from the frequency-domain fatigue analysis, the design points to optimize the weld pitch distance are determined. For obtaining the welding pitch combination to maximize the fatigue life of the spot welding nuggets, 4-factor, 3-level orthogonal array experimental design is used. This study shows that the optimized subframe improves the fatigue life of welding nugget with minimum fatigue life about 65.8 % as compared with the baseline design.

A $64\times64$ IRFPA CMOS Readout IC for Uncooled Thermal Imaging (비냉각 열상장비용 $64\times64$ IRFPA CMOS Readout IC)

  • 우회구;신경욱;송성해;박재우;윤동한;이상돈;윤태준;강대석;한석룡
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.5
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    • pp.27-37
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    • 1999
  • A CMOS ReadOut Integrated Circuit (ROlC) for InfraRed Focal Plane Array (IRFPA) detector is presented, which is a key component in uncooled thermal imaging systems. The ROIC reads out signals from $64\times64$ Barium Strontium Titanate (BST) infrared detector array, then outputs pixel signals sequentially after amplifying and noise filtering. Various design requirements and constraints have been considered including impedance matching, low noise, low power dissipation and small detector pitch. For impedance matching between detector and pre~amplifier, a new circuit based on MOS diode structure is devised, which can be easily implemented using standard CMOS process. Also, tunable low pass filter with single~pole is used to suppress high frequency noise. In additions, a clamping circuit is adopted to enhance the signal~to-noise ratio of the readout output signals. The $64\times64$ IRFPA ROIC is designed using $0.65-\mu\textrm{m}$ 2P3M (double poly, tripple metal) N~Well CMOS process. The core part of the chip contains 62,000 devices including transistors, capacitors and resistors on an area of about $6.3-mm\times6.7-mm$.

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A Study on the Pixel-Paralled Image Processing System for Image Smoothing (영상 평활화를 위한 화소-병렬 영상처리 시스템에 관한 연구)

  • Kim, Hyun-Gi;Yi, Cheon-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.11
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    • pp.24-32
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    • 2002
  • In this paper we implemented various image processing filtering using the format converter. This design method is based on realized the large processor-per-pixel array by integrated circuit technology. These two types of integrated structure are can be classify associative parallel processor and parallel process DRAM(or SRAM) cell. Layout pitch of one-bit-wide logic is identical memory cell pitch to array high density PEs in integrate structure. This format converter design has control path implementation efficiently, and can be utilize the high technology without complicated controller hardware. Sequence of array instruction are generated by host computer before process start, and instructions are saved on unit controller. Host computer is executed the pixel-parallel operation starting at saved instructions after processing start. As a result, we obtained three result that 1)simple smoothing suppresses higher spatial frequencies, reducing noise but also blurring edges, 2) a smoothing and segmentation process reduces noise while preserving sharp edges, and 3) median filtering, like smoothing and segmentation, may be applied to reduce image noise. Median filtering eliminates spikes while maintaining sharp edges and preserving monotonic variations in pixel values.

A Study on the Effect of Rivet Layout on the Stress Variation in Doubler Repair (보강재 수리시 리벳 배열이 응력 변화에 미치는 영향 연구)

  • Moon, Ju-Yeon;Shin, Ki-Su
    • Journal of the military operations research society of Korea
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    • v.36 no.1
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    • pp.91-102
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    • 2010
  • Doubler repair is one of the frequently applied methods to repair cracks which occur at the structure of aircraft weapon systems. The requirement of the doubler repair for some of aging aircraft has increased more recently. However very few researches have been conducted until now. In this paper, the effect of the various doubler repair methods was evaluated. Especially, the relationship between the array of revet and the effect of stress concentration was investigated. To calculate variation of the stress with different repair methods, commercial FEA program was utilized. As a result, it was shown that the main factor for the variation of stress is pitch and number of revet line. Furthermore the optimized array of revet for the specific geometries of doubler was suggested.

Measurements on the Aerodynamic Noise Generated from a Tiltrotor (틸트로터에서 발생하는 공력소음의 측정에 관한 연구)

  • Hong, Suk-Ho;Park, Sung;Choi, Jong-Soo;Kim, Kyu-Young;Lee, Duck-Joo
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2005.05a
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    • pp.158-163
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    • 2005
  • In this paper the aeroacoustic characteristics of a tilt-rotor system is measured by using a sealed model tilt-rotor. With a microphone array system and the do-dopplerization algorithm, the location and the characteristics of rotor noise are successfully measured. The most of high frequency noise (4kHz) is found to be located at rotor blade tips, but the low frequency tonal noise is dominant on the middle of the rotor blades. The measured tonal noise characteristics are compared to the results of theoretical calculation. At 0.5m distance from the rotor plane, measured and calculated data are relatively well matched regardless of rotating speed and collective pitch angie for the azimuthal angles between $0^{\circ}\;and\;60^{\circ}$. However, the data on the azimuthal angles between $70^{\circ}\;and\;90^{\circ}$ are not quite comparable. In addition, the compared data for far-field case (1.5m) are quite different. This is probably due to the unsteady effect which if not included in the theoretical calculation.

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Fabrication of Two-dimensional Photonic Crystal by Roll-to-Roll Nanoreplication (롤투롤 나노 복제 공정을 이용한 이차원 광결정 소자의 제작)

  • Kim, Young-Kyu;Byeon, Euihyeon;Jang, Ho-Young;Kim, Seok-Min
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.12 no.5
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    • pp.16-22
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    • 2013
  • A two-dimensional photonic crystal structure was investigated using a roll-to-roll nanoreplication and physical vapor deposition processes for the inexpensive enhanced fluorescence substrate which is not sensitive to the polarization directions of excitation light source. An 8 inch silicon master having nano dot array with a diameter of 200 nm, a height of 100 nm and a pitch of 400 nm was prepared by KrF laser scanning lithography and reactive ion etching processes. A flexible polymer mold was fabricated by flat type UV replication process and a deposition of 10 nm nickel layer as an anti-adhesion layer. A roll mold was prepared by warping the flexible polymer mold on an aluminum roll base and a roll-to-roll UV replication process was carried out using the roll mold. After the deposition of ~ 100 nm $TiO_2$ layer on the replicated nano dot array, a 2 dimensional photonic crystal structure was realized with a resonance wavelength of 635 nm for both p- and s-polarized light sources.

Heat Transfer Enhancement by Trapezoid Rod Array in Impinging Jet System (충돌제트계에서 사다리형 로드 배열에 의한 열전달촉진에 관한 연구)

  • Lim, Tae-Su;Kum, Sung-Min
    • Proceedings of the KSME Conference
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    • 2001.11b
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    • pp.260-267
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    • 2001
  • The objective of this study was to investigate the characteristics of jet flow and heat transfer caused by trapezoid rods array in impinging jet system. In this study, trapezoid rods have been set up in front of flat plate to serve as a turbulence promoter. The bottom width of trapezoid rod was W=4, 8mm and oblique angle were $80^{\circ}$. The space from rods to the heating surface was C=1, 2, 4mm, the pitch between each rods was P=30, 40, 50mm, and the distance from nozzle exit to flat plate was H=100, 500mm. This results were compared with the case without trapezoid rods. As a result, when rods are installed in front of the impinging plate, the acceleration of the jet flow and the eddies due to the rods seem to contribute to the heat transfer enhancement. Among test conditions, the heat transfer performance was best for the condition of W=8mm, C=1mm, P=30mm and H/B=10. The maximum heat transfer rate is about 1.9 times larger than that without trapezoid rods.

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Heat Transfer and Flow Characteristics by Trapezoid Rod Array in Impinging Jet System (충돌제트계에서 사다리형 로드 배열에 의한 열전달 및 유동특성)

  • 금성민
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.13 no.9
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    • pp.904-913
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    • 2001
  • The objective of this study was to investigate the characteristics of jet flow and heat transfer caused by trapezoid rods array in impinging jet system. In this study, trapezoid rods have been set up in front of flat plate to serve as a turbulence promoter. The bottom width of trapezoid rod was W=4, 8 mm and oblique angle were 80$^{\circ}$. The space from rods to the heating surface was C=1, 2, 4 mm, the pitch between each rods was P=30, 40, 50 mm, and the distance from nozzle exit to flat plate was H=100, 500 mm. This results were compared with the case without trapezoid rods. As a result, when rods are installed in front of the impinging plate, the acceleration of the jet flow and the eddies due to the rods seem to contribute to the heat transfer enhancement. Among test conditions, the heat transfer performance was best for the condition of W=8 mm, C=1 mm, P=30 mm and H/B=10. The maximum heat transfer rate is about 1.9 times larger than that without trapezoid rods.

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Thermal analysis of a VCSEL array with flip-chip bond design (플립칩 본딩 구조의 표면방출레이저 어레이에 대한 열 해석)

  • Kim, Seon-Hoon;Kim, Tae-Un;Kim, Sang-Taek;Ki, Hyun-Chul;Yang, Myung-Hak;Kim, Hyo-Jin;Ko, Hang-Ju;Kim, Hwe-Jong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.415-416
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    • 2008
  • The finite element model was used to simulate the temperature distribution of a arrayed vertical-cavity surface-emitting laser (VCSEL). In this work, the dimension of AlGaAs/GaAs based VCSEL array was $50{\mu}m$ active diameter and $250{\mu}m$ pitch, and AuSn solder of 80wt%Au-20wt%Sn was included to flip-chip bond. The results of the thermal simulation will be applied to predict the thermal cross-talk in high speed parallel optical interconnects.

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