• 제목/요약/키워드: Pipeline Structure

검색결과 270건 처리시간 0.022초

초전도 Pipelined Multi-Bit ALU에 대한 연구 (Study of the Superconductive Pipelined Multi-Bit ALU)

  • 김진영;고지훈;강준희
    • Progress in Superconductivity
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    • 제7권2호
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    • pp.109-113
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    • 2006
  • The Arithmetic Logic Unit (ALU) is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. We have developed and tested an RSFQ multi-bit ALU constructed with half adder unit cells. To reduce the complexity of the ALU, We used half adder unit cells. The unit cells were constructed of one half adder and three de switches. The timing problem in the complex circuits has been a very important issue. We have calculated the delay time of all components in the circuit by using Josephson circuit simulation tools of XIC, $WRspice^{TM}$, and Julia. To make the circuit work faster, we used a forward clocking scheme. This required a careful design of timing between clock and data pulses in ALU. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. The fabricated 1-bit, 2-bit, and 4-bit ALU circuits were tested at a few kilo-hertz clock frequency as well as a few tens giga-hertz clock frequency, respectively. For high-speed tests, we used an eye-diagram technique. Our 4-bit ALU operated correctly at up to 5 GHz clock frequency.

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Detection of SCC by Electrochemical Noise and In-Situ 3-D Microscopy

  • Xia, Da-Hai;Behnamian, Yashar;Luo, Jing-Li;Klimas, Stan
    • Corrosion Science and Technology
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    • 제16권4호
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    • pp.194-200
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    • 2017
  • Stress-corrosion cracking (SCC) of alloy 600 and alloy 800 in 0.5 mol/L thiosulfate solution during constant strain was investigated using electrochemical noise (EN) combined with 3-D microscope techniques. The in-situ morphology observation and EN results indicate that the SCC process could be divided into three stages: (1) passive film stabilization and growth, (2) crack initiation, (3) and crack growth. Power Spectral Density (PSD) and the probability distribution obtained from EN were used as the "fingerprint" to distinguish the different processes. During passive film stabilization and growth, the current noise signals resembled "white noise": when the crack initiated, many transient peaks could be seen in the current noise and the wavelet energy at low frequency as well as the noise resistance decreased. After crack propagation, the noise amplitudes increased, particularly the white noises at low and high frequencies ($W_L$ and $W_H$) in the PSDs. Finally, the detection of metal structure corrosion in a simulated sea splash zone and pipeline corrosion in the atmosphere are established.

고속 문자 인식을 위한 특정 추출용 칩의 구현 (Implementation of a Feature Extraction Chip for High Speed OCR)

  • 김형구;강선미;김덕진
    • 전자공학회논문지B
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    • 제31B권6호
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    • pp.104-110
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    • 1994
  • We proposed a high speed feature extraction algorithm and developed a feature vector extraction chip for high speed character recognition. It is hard to implement a high speed OCR by software alone with statistical method . Thus, the whole recognition process is divided into functional steps, then pipeline processed so that high speed processing is possible with temporal parallelism of the steps. In this paper we discuss the feature extraction step of the functional steps. To extract feature vector, a character image is normalized to 40$\times$40 pixels. Then, it is divided into 5$\times$5 subregions and 4x4 subregions to construct 41 overlapped subregions(10x10 pixels). It requires to execute more than 500 commands to extract a feature vector of a subregion by software. The proposed algorithm, however, requires only 10 cycles since it can extract a feature vector of a columm of subregion in one cycle with array structure. Thus, it is possible to process 12.000 characters per second with the proposed algorithm. The chip is implemented using EPLD and the effectiveness is proved by developing an OCR using it.

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U-HDTV를 위한 향상된 병렬 비디오 부호화 기법 (A Parallel Video Encoding Technique for U-HDTV)

  • 정승원;고성제
    • 대한전자공학회논문지SP
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    • 제48권1호
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    • pp.132-140
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    • 2011
  • Ultra-High Definition Television (U-HDTV) 는 차세대 TV로 불리는 실감 TV의 가장 유망한 요소 기술로 주목받고 있으며 이를 효과적으로 압축하기 위한 병렬 비디오 부호화 기술 개발의 필요성이 증대되고 있다. 기존의 병렬 부호화 기술은 영상을 공간적으로 분할하고 분할비디오 (sub-sequence)를 독립적으로 부호화 하는 방식을 사용하였다. 본 논문에서는 분할비디오간의 높은 상호상관 (cross-correlation)을 이용하여 부호화 효율을 향상하는 파이프라인 (pipeline) 구조의 병렬 부 복호화기를 제안한다. 실험결과를 통하여 제안하는 기술이 압축 효율을 향상시키며 균일한 화질의 분할비디오를 생성하는 것을 확인한다.

Advanced procedure for estimation of pipeline embedment on soft clay seabed

  • Yu, S.Y.;Choi, H.S.;Park, K.S.;Kim, Y.T.;Kim, D.K.
    • Structural Engineering and Mechanics
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    • 제62권4호
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    • pp.381-389
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    • 2017
  • In the present study, the advanced procedure has been proposed to estimate higher accuracy of embedment of pipes that are installed on soft clay seabed. Numerical simulation by OrcaFlex simulation code was performed to investigate dynamic seabed embedment, and two steps, i.e., static and dynamic analysis, were adopted. In total, four empirical curves were developed to estimate the seabed embedment including dynamic phenomena, i.e., behaviour of vessel, environmental condition, and behaviour of nonlinear soil. The obtained results were compared with existing methods (named general method) such as design code or guideline to examine the difference of seabed embedment for existing and advance methods. Once this process was carried out for each case, a diagram for estimating seabed embedment was established. The applicability of the proposed method was verified through applied examples with field survey data. This method will be very useful in predicting seabed embedment on soft clay, and the structural behaviours of installed subsea pipelines can be changed by the obtained seabed embedment in association with on-bottom stability, free span, and many others.

GPU 기반의 MPEG-2 디코더의 구현 (Implementation of GPU based MPEG-2 Decoder)

  • 김경수;김홍식;김정길;박우찬
    • 디지털콘텐츠학회 논문지
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    • 제9권3호
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    • pp.371-377
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    • 2008
  • 최근 GPU 성능은 CPU 성장 속도에 비하여 급속도로 증가하고 있으며 계산이 많이 요구되는 다양한 응용 프로그램에서 GPU를 이용하려는 시도가 활발히 진행되고 있다. 본 논문에서는 GPU 프로그래밍 언어인 CG를 이용하여 MPEG-2 디코더를 구현하였다. 제안된 방법은 텍스쳐 데이터를 사용하여 비디오 표준에 맞춘 블록 렌더링을 하는 방식이며, 이는 스트림 프로세싱 구조인 GPU의 파이프라인을 이용하여 높은 병렬성을 가지고 실행된다. 또한 시스템 메모리와 GPU 사이의 데이터 대역폭을 줄이기 위해 그래픽 카드의 지역 메모리를 사용한다. 제안한 방법을 적용한 결과 CPU 보다 2배 이상의 성능 향상을 볼 수 있었다.

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효율적인 통신망 관리를 위한 TTS 시스템 분석 및 설계 (Analysis of Trouble Ticket System for Efficient Network Management)

  • 김점구
    • 융합보안논문지
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    • 제7권4호
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    • pp.9-10
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    • 2007
  • 최근 통신망 인프라 구축이 늘어나면서 이의 신뢰성(Reliability)과 가용성(Availability)이 경제 주체인 조직 전반의 생산성에 미치는 영향이 그 만큼 커지고 있다. 정보 흐름의 파이프 역할을 담당하고 있는 통신망 시설(하드웨어 및 운용 프로토콜)에 일시적인 장애가 발생할 경우 이로 인해 조직은 엄청난 손실을 입을 수 있다. 따라서 통신망을 안정적으로 운용할 수 있는 보다 효과적인 수단이 요구되고 있다. 통신망에서의 장애를 효과적으로 해결하기 위해서는 장애를 추적하는 장애처리티켓시스템(Trouble Ticket System)이 필요하다. 장애처리티켓시스템은 궁극적으로 네트워크 운영 방식을 획기적으로 개선함으로써 통신망 장애로 인한 시간적, 경제적 손실을 최소화할 수 있다. 본 논문에서는 티켓의 구조 설계와 장애 처리 과정을 분석함으로써 국내 실정에 맞는 장애처리티켓시스템 개발에 적극 활용할 수 있다.

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디지털 필터뱅크 기반 플렉서블 위성중계기를 위한 채널화 기법의 성능비교 연구 (Performance Comparison of Channelization Schemes for Flexible Satellite Transponder with Digital Filter Banks)

  • 이동훈;김기선
    • 한국군사과학기술학회지
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    • 제13권3호
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    • pp.405-412
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    • 2010
  • The purpose of this paper is to compare complexity and to assess flexibility of competing transponder architectures for satellite communication services. For performance comparison, we consider three channelization techniques: digital down converter(DDC) based on the use of the cascaded integrator-comb(CIC) filter, tuneable pipeline frequency transform(T-PFT) based on the tree-structure(TS) and variable oversampled complex-modulated filter banks(OCM-FB) based on the polyphase FFT(P-FFT). The comparison begins by presenting a basic architecture of each channelization method and includes analytical expressions of the number of multiplications as a computational complexity perspective. The analytical results show that DDC with CIC filter requires the heavy computational burden and the perfect flexibility. T-PFT based on the TS provides the almost perfect flexibility with the low complexity over DDC with the CIC filter for a large number of sub-channels. OCM-FB based on the P-FFT shows the high flexibility and the best computational complexity performance compared with other approaches.

높은 처리량을 가지는 AES를 위한 효율적인 파이프라인을 적용한 하드웨어 설계 (Hardware Design with Efficient Pipelining for High-throughput AES)

  • ;류광기
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2017년도 추계학술대회
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    • pp.578-580
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    • 2017
  • IoT 기술의 발전으로 IoT 기기들 사이의 통신에 보안이 중요해지고 있으며, 다양한 보안 알고리즘을 사용하고 있다. 많은 대칭 키 알고리즘 중에 AES (Advanced Encryption Standard) 알고리즘은 높은 보안성으로 지금까지 사용하고 있다. 본 논문에서는 효율적인 AES 알고리즘의 하드웨어 구조를 제안한다. 제안하는 하드웨어 구조는 암호화 모듈과 키 생성 모듈에 4단 파이프라인 구조를 적용하여, 높은 처리량과 낮은 지연시간을 가진다. 총 512비트의 일반 텍스트를 46 사이클에 처리가 가능하다. 제안하는 하드웨어 디자인은 65nm 공정에서 1.18GHz의 최대 주파수와 13Gbps의 처리량을 가지며, 180nm 공정에서 800MHz의 최대 주파수와 8.9Gbps의 처리량을 가진다.

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유도초음파를 이용한 장거리 배관 탐상기법 (Long Range Ultrasonic Guided Wave Techniques for Inspection of Pipes)

  • 박익근;김용권;김현묵;송원준;조용상;안연식
    • Journal of Welding and Joining
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    • 제23권5호
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    • pp.43-48
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    • 2005
  • Conventional non-destructive techniques for inspection of the weld in pipelines require significant test time and high cost. Ultrasonic guided waves have been widely studied and successfully applied to various non-destructive tests with advantage of the long-range inspection. In this paper, a study on the application of ultrasonic guided waves to the long-range inspection of the pipeline is presented using a long-range guided wave inspection system, Wavemaker SE16, GUL. The characteristics and setup of the long-range guided wave inspection system and experimental results in pipes of with various diameter are introduced. The experimental results in mock-up pipes with cluster type detects show that the minimum detectable wall thickness reduction with this guided wave system is $2\~3\%$ in the pipe cross section area. And the wall thickness reduction of $5\%$ in cross section area can be detected when actual detection level is used. Therefore, the applicability of the guided wave systeme to long-range inspection of wall thickness reduction in pipes is verified.