• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 A
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• pp.365-367
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• 1995

This paper is concerned on developing low-voltage high-current DC-DC converter using FB-ZVS PWM Converter. The converter output is 28V, 100A and regulated by phase-shift control method. IGBT is used by the main switching device and high frequency transformer is made for operating at 30kHz switching frequency. When the load vary widely, converter's ZVS characteristic is expressed by experiment result.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 추계학술대회 논문집
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• pp.67-68
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• 2016

본 논문에서는 높은 승 강압비를 갖는 비절연형 양방향 컨버터를 제안한다. 제안하는 양방향 컨버터는 입력-병렬/출력-직렬(Parallel-Input/Series-Output, PISO) 구조로 인터리빙효과와 높은 전압이득을 얻을 수 있고 소자들의 전압정격이 고전압측 전압의 1/4배 수준으로 소자 선정이 용이하다. 또한, PWM plus Phase-Shift(PPS) 제어기법을 적용하여 전력의 흐름을 제어하면서 소프트스위칭을 최적화할 수 있다. 2kW급 시작품을 통해 듀티(D) 0.51 ~ 0.64를 사용하여 7 ~ 10배의 승 강압비를 달성하였으며 최고효율 96.1% 96.1%, 정격부하에서 95.9%, 96.0%를 달성하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.708-712
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• 2001

A new phase-shifted parallel-input/series-output (PI SO) dual inductor-fed push-pull converter for high-power step­up applications is proposed. This converter is operated at a constant duty cycle and employs an auxiliary circuit to control the output voltage with a phase-shift between the two modules. It features a voltage conversion characteristic which is linear to changes in the control input, and high step-up ratio with a greatly reduced switch turn-off stress resulting in a significant increase in the converter efficiency. It also shows a low ripple content and low root-mean-square (RMS) current in the output capacitor. The operational principle is analyzed and a comparative analysis with the conventional pulse-width-modulated (PWM) PISO dual inductor-fed push-pull converter is presented. A 50kHz, 800W, 350Vdc prototype with an input of 20-32Vdc has also been constructed to validate the proposed converter. The proposed converter compares favorably with the conventional counterpart and is considered well suited to high-power step-up applications.

• IEIE Transactions on Smart Processing and Computing
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• 제2권5호
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• pp.310-316
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• 2013

This paper reports a sinusoidal $180^{\circ}$ drive for a permanent magnet (PM) brushless motor employing automatic angle compensator to suppress the driving loss during the wide-range load operation. The proposed drive of the sinusoidal $180^{\circ}$ PM Brushless motor reduced the amplitude of the 3-phase current by compensating for the lead-angle of the fundamental waves of the 3-phase PWM signal. The conventional lead-angle method was implemented using the fixed angle or memorized table, whereas the proposed method was automatically compensated by calculating the angle of the current and voltage signal. The algorithm of the proposed method was verified in a 30 W PM brushless motor system using a PSIM simulator. The efficiency of the conventional method was decreased 90 % to 60 %, whereas that of proposed method maintained approximately 85 % when the load shift was 0 to $0.02N{\cdot}m$. Using an FPGA prototype, the proposed method was evaluated experimentally in a 30 W PM brushless motor system. The proposed method maintained the minimum phase RMS current and 79 % of the motor efficiency under 0 to $0.09N{\cdot}m$ load conditions. The proposed PM brushless motor driving method is suitable for a variety of applications with a wide range of load conditions.

• Journal of Power Electronics
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• 제15권6호
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• pp.1429-1437
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• 2015

A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.

• Journal of Power Electronics
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• 제12권4호
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• pp.567-577
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• 2012

This paper introduces a new scheme to balance the DC bus voltages of a cascaded H-bridge converter which is used as a Distribution Static Synchronous Series Compensator (D-SSSC) in electrical distribution network. The aim of D-SSSC is to control the power flow between two feeders from different substations. As a result of different cell losses and capacitors tolerance the cells DC bus voltage can deviate from their reference values. In the proposed scheme, by individually modifying the reference PWM signal for each cell, an effective balancing procedure is derived. The new balancing procedure needs only the line current sign and is independent of the main control strategy, which controls the total DC bus voltages of cascaded H-bridge. The effect of modulation index variation on the capacitor voltage is analytically derived for the proposed strategy. The proposed method takes advantages of phase shift carrier based modulation and can be applied for a cascaded H-bridge with any number of cells. Also the system is immune to loss of one cell and the presented procedure can keep balancing between the remaining cells. Simulation studies and experimental results validate the effectiveness of the proposed method in the balancing of DC bus voltages.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.313-316
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• 2005

본 논문은 대용량 진력변환장치인 멀티-레벨 인버터 시스템에서 출력 전압가변이 손쉬운 HBML(H-Bridge Multi-Level) 인버터의 Master와 Cell 제어기 구성에 관한 것이다. HBML 인버터는 각각의 단위 Cell을 저압에서 사용하는 인버터로 구성하면, 구조적으로 풀-브릿지(Full-Bridge) 인버터를 캐스케이드 방식으로 연결하여 고압출력을 얻을 수 있는 토폴로지이다. 시스템에서 Master와 Cell의 제어 처리를 한곳에 집중하지 않는 분산 제어 방식을 적용하여 통신 Data를 최적화하도록 구성하고, 이를 바탕으로 두 제어기를 고성능 원-칩(One-Chip) DSP로만 설계하였다. 모든 외부 모듈을 내장한 CPU로 제어기가 구성될 경우, 외부 노이즈에 강하며, 추가되는 하드웨어 결선을 최소화할 수 있다. 본 논문에서는 HBML 인버터 출력 생성 시 반드시 요구되는 출력 PWM 동기 및 위상전이(Phase Shift)를 각 제어기 자체에 내장된 모듈만을 이용해서 구현하였다.