• ETRI Journal
• /
• v.26 no.5
• /
• pp.501-504
• /
• 2004

This paper presents a simple gain/phase blind compensation algorithm with an automatic gain control (AGC) function for the adoption of the AGC function and compensation for gain/phase imbalances in quadrature phase shift keying (QPSK) direct conversion receivers (DCRs). The AGC function is interactively operated with the compensation algorithm for gain/phase imbalances. By detecting the gain sum and difference values between the I-channel and Q-channel, the combined AGC and gain imbalance compensation algorithm provides a simpler DCR architecture.

• Journal of Institute of Control, Robotics and Systems
• /
• v.4 no.3
• /
• pp.406-412
• /
• 1998

This paper describes a contact position detection method of a capacitive touch screen panel. The proposed method is composed of a circuited compensating algorithm generating an output signal having phase difference to an input signal associated with contact position, converts both input and output signals into digital waveform (5V logic), and calculates the phase difference. Finally, position information with the phase difference is obtained by using a low-cost microprocessor, which is convenient to compensate non-linearity error. The proposed method, that computes phase difference directly, has advantages in feasibility and cost because it minimizes the use of analog devices; rather, it utilizes, cost effective digital circuit. Analytical results are also given.

• Journal of Communications and Networks
• /
• v.8 no.3
• /
• pp.351-359
• /
• 2006

In this article, we present a new slow-start variant, which improves the throughput of transmission control protocol (TCP) Vegas. We call this new mechanism Gallop-Vegas because it quickly ramps up to the available bandwidth and reduces the burstiness during the slow-start phase. TCP is known to send bursts of packets during its slow-start phase due to the fast window increase and the ACK-clock based transmission. This phenomenon causes TCP Vegas to change from slow-start phase to congestion-avoidance phase too early in the large bandwidth-delay product (BDP) links. Therefore, in Gallop-Vegas, we increase the congestion window size with a rate between exponential growth and linear growth during slow-start phase. Our analysis, simulation results, and measurements on the Internet show that Gallop-Vegas significantly improves the performance of a connection, especially during the slow-start phase. Furthermore, it is implementation feasible because only sending part needs to be modified.

• The Transactions of the Korean Institute of Electrical Engineers B
• /
• v.53 no.6
• /
• pp.396-401
• /
• 2004

Single phase induction motor(SPIM) is one of the most widely used type of low power AC motors in the world, especially for domestic or commercial applications where a three phase power supply is not available. Single phase induction motors have no starting torque their own. So there are several ways of starting single phase induction motors. The most common type is the starting capacitor installed in series with the auxiliary winding to increase the starting torque. In the conventional systems, this function is conducted by a centrifugal switch. But the mechanical centrifugal switch has many problems such as switch malfunction. This paper presents the auxiliary winding control using digital universal starting switch to overcome these shortcomings of centrifugal switch.

• Journal of information and communication convergence engineering
• /
• v.3 no.1
• /
• pp.18-22
• /
• 2005

This paper presents the analog adaptive phase-locked loop (PLL) architecture with a new adaptive bandwidth controller to reduce locking time and minimize jitter in PLL output for wireless communication. It adaptively controls the loop bandwidth according to the locking status. When the phase error is large, the PLL increases the loop bandwidth and reduces locking time. When the phase error is small, the PLL decreases the loop bandwidth and minimizes output jitters. The adaptive bandwidth control is implemented by controlling charge pump current depending on the locking status. A 1.28-GHz CMOS phase-locked loop with adaptive bandwidth control is designed with 0.35 $mu$m CMOS technology. It is simulated by HSPICE and achieves the primary reference sidebands at the output of the VCO are approximately -80dBc.

• Proceedings of the KIEE Conference
• /
• 2007.07a
• /
• pp.187-189
• /
• 2007

In this paper, the cascade 3-phase IHMCL inverter using two low frequency transformers is proposed. The proposed inverter is constructed by connecting a 3-phase IHCML inverter. the cascade 3-phase IHCML inverter has several advantages. One advantage is that only one input power source is required because of using transformers to isolate. Another advantage is that the switching frequency of the high power switches is almost fundamental frequency of reference and the other the switching frequency of the low power switches is higher. It can be known that cascade 3 phase IHCML inverter has the excellent efficiency and the outstanding electric quality. lastly, we tested the 5kW cascade 3-phase IHCML inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed inverter.

• Journal of Korean Society for Quality Management
• /
• v.42 no.3
• /
• pp.279-290
• /
• 2014

Purpose: The purpose of this study is to propose adoption of QFD and Stage-gate in order to analyze the quality of korea defense system. Methods: Drawing change data of initial production phase in korea defense system were anlayzed and a practical method was proposed. Results: The results of this study are as follows; Off line Quality Control should be introduced in development phase. Specially, in case of defense system, the best method is QFD(Quality Function Deployment) and Stage-gate process. At first, QFD 1 step defines product planning from VOC(Voice Of Customer), QFD 2 step specifies part planning from product planning, QFD 3 step defines process planning from part planning, QFD 4 step defines production planning from previous process planning. Secondly, Stage-gate process is adopted. This study is proposed 5 stage-gate in case of korea defense development. Gate 1 is located after SFR(System Function Review), Gate 2 is located after PDR(Preliminary Design Review), Gate 3 is located after CDR(Critical Design Review), Gate 4 is located after TRR(Test Readiness Review) and Gate 5 is located before specification documentation submission. Conclusion: Off line QC(Quality Control) in development phase is necessary prior to on line QC(Quality Control) in p roduction phase. For the purpose of off line quality control, QFD(Quality Function Deployment) and Stage-gate process can be adopted.

• Journal of Korean Society of Transportation
• /
• v.20 no.2
• /
• pp.149-159
• /
• 2002

The performance of two single-barrier three-phase control systems at diamond interchanges was evaluated for various traffic conditions. To emulate the actuated signal control, hardware-in-the-loop system combined with CORSIM simulation program was used. Two performance measures, average delay and total stops, were used for the evaluation process. Results showed that the two three-phase systems gave similar performance in terms of average delay, but not stops. The delay performance of each phasing system was generally dependent on the traffic pattern and ramp spacing. However, there was a distinct movement preference for each phasing system. The total stops decreased as the spacing increased, and it was the most sensitive variable that can differentiate between the two three-phase systems. It was also shown that the hardware-in-the-loop control could be a good method to overcome the limitations of current simulation technology.

• Journal of the Korean Society of Physical Medicine
• /
• v.7 no.2
• /
• pp.213-221
• /
• 2012

Purpose : The purpose of this study was to investigate the effect of Vojta therapy on Gross Motor Function Measurement(GMFM) and Selective Voluntary Motor Control (SVMC) in children with Spastic diplegia. Methods : During this experiment, the subject of four children diagnosed with spastic diplegia was tested using ABA design for Single-subject Experimental Research Design. The procedure consisted of baseline, intervention and follow-up phase which was held thirty minutes each for three times a week for a total of 24 times. Gross motor function was measured using GMFM and selective voluntary motor control was measured using SCALE. Results : According to this study, the gross motor function and selective voluntary motor control of all subjects were improved from their intervention phase to their baseline phase. During the follow phase which the intervention was removed, the ability that was enhanced during the prior phases was still either maintained or only reduced slightly. Conclusion : The Vojta therapy used on children diagnosed with spastic diplegia was effective on both GMFM and SVMC. In other words, the therapy was effective on coordination. However, this study is difficult to be generalized due to the insufficient number of subject. In further studies, it will be necessary to increase the number of trials with a control group in order to generalize the effectiveness of Vojta therapy.

• Journal of Power Electronics
• /
• v.17 no.1
• /
• pp.31-40
• /
• 2017

A novel voltage-fed single-stage power factor correction (PFC) full-bridge converter based on asymmetric phase-shifted control for battery chargers is proposed in this paper. The attractive feature of the proposed converter is that it can operate in a wide output voltage range without an output low-frequency ripple, which is indispensable in battery charger applications. Meanwhile, the converter can maintain a high power factor and a controllable dc bus voltage over a wide output voltage range. In this paper, the realization of PFC and the operation principle of asymmetric phase-shifted control are given. A small-signal analysis of the proposed single-stage power factor correction (PFC) full-bridge converter is performed. Experimental results obtained from a 1kW experimental prototype are given to validate the feasibility of the proposed converter. The PF is higher than 0.97 over the entire output voltage range with the proposed control strategy.