• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.735-738
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• 2005

The phase error in the digital transmission system are generated by random phase noise and tracking phase error due to doppler phenomenon. In the mobile satellite communication system that generates the doppler frequency, which is a system with a movement, the proper system phase noise spectrum should be designed based on analyses for phase noise and static phase error effects. Based on the analyses of the doppler frequency and the phase error for bilateral satellite communication system providing an asynchronous service, the phase noise spectrums for the mobile satellite communication are designed in this paper. Also, the available transmission services under the less doppler effect are proposed and the proper signal source units for a required transmission system can be designed under the proposed system phase noise spectrum.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.158-162
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• 2015

A low phase noise CMOS voltage controlled oscillator(VCO) for multi-band/multi-standard RF Transceivers is presented. For both wide tunability and low phase noise characteristics, Hybrid inductor which uses both bondwire inductor and planar spiral inductor in the same area, is proposed. This approach reduces inductance variation and presents high quality factor without custom-designed single-turn inductor occupying large area, which improves phase noise and tuning range characteristics without additional area loss. An LC VCO is designed in a 0.13um CMOS technology to demonstrate the hybrid inductor concept. The measured phase noise is -121dBc/Hz at 400KHz offset and -142dBc/Hz at 3MHz offset from a 900MHz carrier frequency after divider. The tuning range of about 28%(3.15 to 4.18GHz) is measured. The VCO consumes 7.5mA from 1.3V supply and meets the requirements for GSM/EDGE and WCDMA standard.

• Journal of Satellite, Information and Communications
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• v.6 no.1
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• pp.45-49
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• 2011

In this paper, we present the high resolution and low phase noise frequency synthesizer for satellite terminal. To improve the phase noise of frequency synthesizer, we analyze how the configuration of frequency synthesizer affect the phase noise. The implemented frequency synthesizer reduce the phase noise and show the high resolution. The output power of this frequency synthesizer is over -2dBm in 950~1450MHz and the phase noise of the -101dBc/Hz at 10kHz frequency offset.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.649-659
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• 2003

OFDM/FH communication system Is widely used in the wireless communication for the large capacity and high-speed data transmission. However, phase noise and PAPR (peak-to-average power ratio) are the serious problems causing performance impairment. In this paper, PLL (phase locked loop) frequency synthesizer with high switching speed is used for the phase noise model. SSPA and TWTA are considered for the nonlinear HPA model. Under these conditions and by approximating $e^{j{\phi}[m]}$ into $1 + j{\phi}[m]-\frac{1}{2}{\phi}^2[m]$ for the phase noise nonlinear approximation, SINR (signal-to-interference-noise-ratio) with nonlinear HPA and phase noise is derived in the OFDM/FH system. The bit error probabilities (BER) are found by computer simulation method and semi-analytical method. The simulation results closely match with the semi-analytical results.

• ETRI Journal
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• v.18 no.3
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• pp.147-160
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• 1996

We investigate noise-induced phase transitions in globally coupled active rotators with multiplicative and additive noises. In the system there are four phases, stationary one-cluster, stationary two-cluster, moving one-cluster, and moving two-cluster phases. It is shown that multiplicative noise induces a bifurcation from one-cluster phase to two-cluster phase. Pinning force also induces a bifurcation from moving phase to stationary phase suppressing the multiplicative noise effect. Additive noise reduces both effects of multiplicative noise and pinning force urging the system to the stationary one-cluster phase. The frustrated effects of pinning force and additive and multiplicative noises lead to a reentrant transition at intermediate additive noise intensity. Nature of the transition is also discussed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.501-503
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• 2008

This paper presents the design of a 2.4 GHz low phase noise fully integrated LC Voltage-Controlled-Oscillator (VCO) in $0.18{\mu}m$ CMOS technology. The VCO is without any tail bias current sources for a low phase noise and, in which differential varactors are adopted for the symmetry of the circuit. At the same time, the use of differential varactors pairs reduces the tuning range, i.e., the frequency range versus VTUNE, so that the phase noise becomes lower. The simulation results show the achieved phase noise of -138.5 dBc/Hz at 3 MHz offset, while the VCO core draws 3.9mA of current from a 1.8V supply. The tuning range is from 2.28GHz to 2.55 GHz.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.903-905
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• 2005

Theoretical expressions are introduced to achieve low phase-noise ring oscillators. Understanding of the relations between the phase-noise and the design parameters leads to the reduction of the phase-noise at the stage of the circuit design. Using expressions from reference, ways of reducing the phase noise are suggested.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.05a
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• pp.679-681
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• 2014

The performance of M-ary APSK modulation system due to phase noise are analyzed in this paper. The effects for phase noise in the higher order modulation are simulated by using constellation of the higher order modulation signals. the simulated results are verified by comparing with the analytic results for lower order PSK modulation signals. Based on the evaluation of simulation method, the phase noise effects for higher order APSK modulation signals are suggested in this paper.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.21 no.10
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• pp.916-923
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• 2011

The refrigerant after the expansion valve interchanges the heat at the evaporator. At this moment, the state of gas and liquid becomes two-phase flow and causes irregular noise. In order to avoid the noise, the two-phase flow pattern should be predicted. In this paper, the procedure to predict the two-phase flow patterns such as churn flow and annular flow was suggested using the CFD software. The experiments using refrigerant-supplying equipment was carried out and the noise levels according to the flow pattern were measured. The flow patterns predicted by this procedure showed good agreement with those by experiments. The churn flow is noisier than annular flow pattern.

• Journal of Multimedia Information System
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• v.5 no.2
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• pp.139-142
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• 2018

This work presents a novel architecture of phase locked loop (PLL) with the current compensating scheme to improve phase noise characteristic. The proposed PLL has two charge pumps (CP), main-CP (MCP) and sub-CP (SCP). The smaller SCP current with same time duration but opposite direction of UP/DN MCP current is injected to the loop filter (LF). It suppresses the voltage fluctuation of LF. The PLL has a novel voltage controlled oscillator (VCO) consisting of a voltage controlled resistor (VCR) and the three-stage ring oscillator with latch type delay cells. The VCR linearly converts voltage into current, and the latch type delay cell has short active on-time of transistors. As a result, it improves phase noise characteristic. The proposed PLL has been fabricated with $0.35{\mu}m$ 3.3 V CMOS process. Measured phase noise at 1 MHz offset is -103 dBc/Hz resulting in 3 dBc/Hz phase noise improvement compared to the conventional PLL.