• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.192-194
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• 2018

In this paper a new single-stage ac-dc converter with high frequency isolation and low components count is introduced. The proposed converter is constructed using two interleaved boost circuits in the grid side and non-regulating full bridge in the DC side. An optimized switching is implemented on the two interleaved boost circuits resulting in a ripple-free grid current without a ripple cancellation network; hence very small filter inductors are used. A simple and reliable closed-loop control system is easily implemented, since the phase-shift angle is the only independent variable. Moreover, current imbalance is avoided in the presented topology without current control loop in each phase. The proposed charger charges the battery with a sinusoidal-like current instead of a constant direct current. ZVS turn on of all switches is achieved throughout the operation in both directions of power flow without any additional components.

• ETRI Journal
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• v.26 no.3
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• pp.229-240
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• 2004

This paper reports on our development of a dual-mode transceiver for a CMOS high-rate Bluetooth system-onchip solution. The transceiver includes most of the radio building blocks such as an active complex filter, a Gaussian frequency shift keying (GFSK) demodulator, a variable gain amplifier (VGA), a dc offset cancellation circuit, a quadrature local oscillator (LO) generator, and an RF front-end. It is designed for both the normal-rate Bluetooth with an instantaneous bit rate of 1 Mb/s and the high-rate Bluetooth of up to 12 Mb/s. The receiver employs a dualconversion combined with a baseband dual-path architecture for resolving many problems such as flicker noise, dc offset, and power consumption of the dual-mode system. The transceiver requires none of the external image-rejection and intermediate frequency (IF) channel filters by using an LO of 1.6 GHz and the fifth order onchip filters. The chip is fabricated on a $6.5-mm^{2}$ die using a standard $0.25-{\mu}m$ CMOS technology. Experimental results show an in-band image-rejection ratio of 40 dB, an IIP3 of -5 dBm, and a sensitivity of -77 dBm for the Bluetooth mode when the losses from the external components are compensated. It consumes 42 mA in receive ${\pi}/4-diffrential$ quadrature phase-shift keying $({\pi}/4-DQPSK)$ mode of 8 Mb/s, 35 mA in receive GFSK mode of 1 Mb/s, and 32 mA in transmit mode from a 2.5-V supply. These results indicate that the architecture and circuits are adaptable to the implementation of a low-cost, multi-mode, high-speed wireless personal area network.

• Journal of the Korean Society for Nondestructive Testing
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• v.32 no.5
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• pp.484-493
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• 2012

Since the 1980s, there have been many research activities devoted to quantitatively characterizing and imaging human tissues based on sound speed, attenuation coefficient, density, nonlinear B/A parameter, etc., but those efforts have not yet reached the stage of commercialization. However, a new imaging technology termed elastography, which was proposed in the early 1980s, has recently been implemented in commercial clinical ultrasound scanners, and is now being used to diagnose prostates, breasts, thyroids, livers, blood vessels, etc., more quantitatively as a complementary adjunct modality to the conventional B-mode imaging. The purpose of this article is to introduce and review various elastographic algorithms for use in quasistatic or static compression type elasticity imaging modes. Most of the algorithms are based on the crosscorrelation or autocorrelation function methods, and the fundamental difference is that the time shift is estimated by changing the lag variable in the former, while it is directly obtained from the phase shift at a fixed lag in the latter.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.3
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• pp.609-614
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• 2017

In this study, a new type of eccentric cam was used for the development of a small size reducer with a two-shift reduction ratio while maintaining the same volume as the existing one-shift speed reducer. Therefore, a two-shift speed reducer was designed using the concept of a continuously variable transmission applied to automobiles. The cam was designed to have an eccentric shape with a $180^{\circ}$ phase difference to act as a tensioner to minimize slip by squeezing the V-belt connected to the deceleration pulley and the acceleration pulley, respectively. The cam was designed to have a diameter of 35mm and an outer diameter of 18mm so that the outer portion of the v-belt could contact the cam perfectly. A pulley with a diameter of 50.8mm was installed on the low speed pulley input shaft for deceleration and a pulley with a diameter of 76.2mm was provided on the output shaft. In the high-speed pulley for acceleration, a pulley with a diameter of 76.2mm is provided on the input shaft, and a pulley with a diameter of 50.8mm is provided on the output shaft. Based on the design details, the power transmission efficiency test and the heating characteristics of the transmission were tested to verify the feasibility. In addition, through validation, the suitability of the reducer was demonstrated.

• Journal of Power Electronics
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• v.18 no.1
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• pp.34-44
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• 2018

This paper presents a pulse-width adjustment (PWA) strategy for a novel bidirectional DC-DC boost converter to improve the performance of the dynamic inductor current response. This novel converter consists of three main components: a full-bridge converter (FBC), a high-frequency isolated transformer with large leakage inductance, and a three-level voltage-doubler rectifier (VDR). A number of scholars have analyzed the principles, such as the soft-switching performance and high-efficiency characteristic, of this converter based on pulse-width modulation plus phase-shift (PPS) control. It turns out that this converter is suitable for energy storage applications and exhibits good performance. However, the dynamic inductor current response processes of control variable adjustment is not analyzed in this converter. In fact, dc component may occur in the inductor current during its dynamic response process, which can influence the stability and reliability of the converter system. The dynamic responses under different operating modes of a conventional feedforward control are discussed in this paper. And a PWA strategy is proposed to enhance the dynamic inductor current response performance of the converter. This paper gives a detailed design and implementation of the PWA strategy. The proposed strategy is verified through a series of simulation and experimental results.

• Journal of Power Electronics
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• v.19 no.5
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• pp.1203-1215
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• 2019

Sensorless brushless DC (BLDC) motor drive systems are often subjected to inaccurate commutation signals and can produce high current peaks and conduction consumption. To achieve accurate commutation, a fast commutation shift regulation method for sensorless BLDC motor drive systems considering the influence of the inductance freewheeling process is presented to compensate inaccurate commutation signals. The regulation method is effective in both steady speed and variable speed operations. In the proposed method, the commutation error is gained from the line-voltage difference integral in a 60 electrical-degree conduction period and the outgoing phase current before commutation. In addition, the detection precision of the commutation error is improved due to the consideration of the freewheeling period. The commutation error is directly obtained, which avoids successive optimization and accelerates the convergence rate of the proposed method. Moreover, the commutation error features a positive or negative sign, which can be utilized as an indicator of advanced or delayed commutation. Finally, experiments are conducted to validate the effectiveness and feasibility of the proposed method. The results obtained show that the proposed method can accurately regulate commutation signals.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.68-74
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• 2010

A sub-${\mu}$W CMOS Wien-Bridge oscillator for ultra low power (ULP) radio applications is presented. The Wien-Bridge oscillator is based on an non-inverting opamp amplifier with a closed-loop gain $1+R_2/R_1$ as a means of providing necessary loop gain. An additional RC network provides appropriate phase shift for satisfying the Barkhausen oscillation condition at the given frequency of 1/($2{\pi}RC$). In this design, we propose a novel loop gain control method based on a variable capacitor network instead of a rather conventional variable resistor network. Implemented in $0.18{\mu}m$ CMOS, the oscillator consumes only 560 nA at the oscillation frequency of 22 kHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.8
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• pp.1797-1804
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• 2011

In this paper, I analyzed array organization of MIMO channel antenna and effect of operation environment by evaluating average BER from linear Space-Time Block Code orthogonal design and suggests designing condition of MT antenna for improved BER and the fading index m. To analyze system performance, I used M-PSK and M-QAM modulation, and to use analysis equations I used integrated by Nakagami fading variable, non-integrated Nakagami fading variable. We can get the organization of channel array by using mathematical calculation on matrix. STBE BER performance will decrease as AOA spreading decrease and such loss can be compensated from extending antenna spacing, and changing array organization.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.16 no.2
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• pp.69-76
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• 2023

A high-quality audio/voice codec using the MDCT/IMDCT process can perfectly restore the current frame through an overlap-add process with the previous frame. In the overlap-add process, an algorithm delay equal to the frame length occurs. In this paper, we propose a MDCT/IMDCT process that reduces algorithm delay by using a variable phase shift in MDCT/IMDCT process. In this paper, a low-delay audio/speech codec was proposed by applying the low delay MDCT/IMDCT algorithm to the ITU-T standard codec G.729.1 codec. The algorithm delay in the MDCT/IMDCT process can be reduced from 20 ms to 1.25 ms. The performance of the decoded output signal of the audio/speech codec to which low-delay MDCT/IMDCT is applied is evaluated through the PESQ test, which is an objective quality test method. Despite of the reduction in transmission delay, it was confirmed that there is no difference in sound quality from the conventional method.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.17 no.7
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• pp.1823-1840
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• 2023

In order to improve spectral efficiency and reduce power consumption for reconfigurable intelligent surface (RIS) assisted wireless communication systems, a joint design considering irregular RIS topology, RIS on-off switch, power allocation and phase adjustment is investigated in this paper. Firstly, a multi-dimensional variable joint optimization problem is established under multiple constraints, such as the minimum data requirement and power constraints, with the goal of maximizing the system energy efficiency. However, the proposed optimization problem is hard to be resolved due to its property of nonlinear nonconvex integer programming. Then, to tackle this issue, the problem is decomposed into four sub-problems: topology design, phase shift adjustment, power allocation and switch selection. In terms of topology design, Tabu search algorithm is introduced to select the components that play the main role. For RIS switch selection, greedy algorithm is used to turn off the RISs that play the secondary role. Finally, an iterative optimization algorithm with high data-rate and low power consumption is proposed. The simulation results show that the performance of the irregular RIS aided system with topology design and RIS selection is better than that of the fixed topology and the fix number of RISs. In addition, the proposed joint optimization algorithm can effectively improve the data rate and energy efficiency by changing the propagation environment.