• 한국지구과학회:학술대회논문집
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• 2010.04a
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• pp.59-62
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• 2010

The limitation of constant for tide correction is identified using the T_tide $MATLAB^{(R)}$ package. A suggestion is presented in calculation of local phase lag(k) by a/15 (a is angular speed of any constituent in degree) from the g, phase lag measured by standard time meridian latitude.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.6C
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• pp.453-461
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• 2012

This paper proposes an improved phase estimation method for AM(Amplitude Modulation) range measurement system. The previous phase estimation method induces errors by Doppler shift of a moving target. The proposed method compensates phase estimation error through the ADC(Adaptive Doppler Correction) to take the Doppler shift, thus can improve distance measurement accuracy. When compared with the previous method through simulation results, the Doppler shift compensation and accuracy are improved by 94.7% and 50%, respectively. Target distance error in an acoustic tank is estimated to be 7.7cm, which confirms that the proposed method can be used to estimate the distance in the marine environment.

• Journal of Software Assessment and Valuation
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• v.15 no.1
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• pp.103-107
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• 2019

Recently, many technologies have been developed to realize low power high speed digital data communication and one of them is related to duty cycle correction. In this paper, a low-area duty cycle correction circuit for a voltage-controlled ring generator is proposed. The duty cycle correction circuit is a circuit that corrects the duty cycle using a 180 degree phase difference of a voltage controlled ring oscillator. The proposed low-area duty cycle circuit changes a conventional flip-flop to a true single phase clocking (TSPC) flip-flop And a low-area high-performance circuit is realized. By using TSPC flip-flop instead of general flip-flop, it is possible to realize low-area circuit compared to existing circuit, and it is expected to be used for high-performance circuit for low-power because it is easy to operate at high speed.

• Journal of the Korean Institute of Telematics and Electronics
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• v.19 no.6
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• pp.33-40
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• 1982

Although ultrasonic CT is one of the useful techniques for tissue characterization, the reconstructed images, such as the velocity distribution and attenuation constant distribution, are degraded by reflection and refraction of ultrasonic beam. This paper studied the degradation effects on attenuation images using agar gel phantoms which were developed to evaluate ultrasonic CT. We found that the reconstructed attenuation constants at the center of the phantoms were less than the actual values by 0.6 dB/cm when phantom velocity differs by 25 m/s from surrounding saline. We also studied a correction method for refraction and phase cancellation effects, where the correction was made using the maximum value in the received subdata, as obtained by sub-arraying microprobes located at each sampling point. Using this method, we could obtain an improvement in the reconstructed image by the correction on the attenuation effect.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.638-646
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• 2005

In recent wireless communications, direct conversion transceiver or If sampling SDR-based receivers have being designed as an alternative to conventional transceiver topologies. In direct conversion receiver a.chitectu.e, the 1.equency/phase offset between the RF input signal and the local oscillator signal is a major impairment factor even though the conventional AFC/APC compensates the service deterioration due to the offset. To rover the limited tracking range of the conventional method and effectively aid compensation scheme in terms of I/Q channel imbalances, the frequency/phase offset compensation in RF-front end signal stage is proposed in this paper. In RF-front end, the varying phase offset besides the fixed large frequency/phase offset are corrected by using early-late phase compensator. A more simple frequency and phase tacking function in digital signal processing stage of direct conversion receiver is effectively available by an ingenious frequency/phase offset tracking method in RF front-end stage.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.314-320
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• 2001

A novel mode of parallel operation of a modular 3-phase AC-DC flyback converter for power factor correction along with tight regulation was recently analyzed and presented. The advantage of the proposed converter does not require expensive high voltage and high current devices that are normally needed in popular boost type 3-phase converter. In this paper the detailed small signal analysis of the modular 3-phase AC-DC flyback converter is provided for control purposes and also experimental results are included to confirm the validity of the analysis.

• Proceedings of the Optical Society of Korea Conference
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• 2006.07a
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• pp.415-416
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• 2006

• Journal of Power Electronics
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• v.17 no.1
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• pp.31-40
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• 2017

A novel voltage-fed single-stage power factor correction (PFC) full-bridge converter based on asymmetric phase-shifted control for battery chargers is proposed in this paper. The attractive feature of the proposed converter is that it can operate in a wide output voltage range without an output low-frequency ripple, which is indispensable in battery charger applications. Meanwhile, the converter can maintain a high power factor and a controllable dc bus voltage over a wide output voltage range. In this paper, the realization of PFC and the operation principle of asymmetric phase-shifted control are given. A small-signal analysis of the proposed single-stage power factor correction (PFC) full-bridge converter is performed. Experimental results obtained from a 1kW experimental prototype are given to validate the feasibility of the proposed converter. The PF is higher than 0.97 over the entire output voltage range with the proposed control strategy.

• Journal of Power Electronics
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• v.16 no.2
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• pp.610-620
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• 2016

The compound active clamp zero voltage soft switching (CACZVS) three-phase power factor correction (PFC) converter has many advantages, such as high efficiency, high power factor, bi-directional energy flow, and soft switching of all the switches. Triple closed-loop PI controllers are used for the three-phase power factor correction converter. The control objectives of the converter include a fast transient response, high accuracy, and unity power factor. There are six parameters of the controllers that need to be tuned in order to obtain multi-objective optimization. However, six of the parameters are mutually dependent for the objectives. This is beyond the scope of the traditional experience based PI parameters tuning method. In this paper, an improved chaotic particle swarm optimization (CPSO) method has been proposed to optimize the controller parameters. In the proposed method, multi-dimensional chaotic sequences generated by spatiotemporal chaos map are used as initial particles to get a better initial distribution and to avoid local minimums. Pareto optimal solutions are also used to avoid the weight selection difficulty of the multi-objectives. Simulation and experiment results show the effectiveness and superiority of the proposed method.

• Journal of Korea Society of Industrial Information Systems
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• v.21 no.4
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• pp.21-30
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• 2016

In a single-phase power factor correction (PFC), the standard cascaded control algorithm using a proportional-integral-derivative (PID) controller has two main drawbacks: an inability to track sinusoidal current reference and low harmonic compensation capability. These drawbacks cause poor power factor and high harmonics in grid current. To improve these drawbacks, this paper uses a proportional-integral-derivative-resonant (PIDR) controller which combines a type-III PID with proportional-resonant (PR) controllers in the PFC. Based on a small signal model of the PFC, the type-III PID controller was implemented taking into account the bandwidth and phase margin of the PFC system. To adopt the PR controllers, the spectrum of inductor current of the PFC was analyzed in frequency domain. The hybrid PIDR controller were simulated using PSCAD/EMTDC and implemented on a 3 kW PFC prototype hardware. The performance results of the hybrid PIDR controller were compared with those of an individual type-III PID controller. Both controllers were implemented successfully in the single-phase PFC. The total harmonic distortion of the proposed controller were much better than those of the individual type-III PID controller.