• Title/Summary/Keyword: Phase Compensation Algorithm

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Controller Design and By-Pass Structure for the Two-Stage Grid-Connected Photovoltaic Power Conditioning System

  • Lee, Seong-Jun;Bae, Hyun-Su;Cho, B.H.
    • Proceedings of the KIPE Conference
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    • 2009.11a
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    • pp.206-208
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    • 2009
  • In this paper, a systematical controller design method for a twostage grid-connected photovoltaic power conditioning system is proposed. For a pre-stage boost converter to achieve the stable operation in the entire region of solar array, the digital resistive current mode controller is used. This algorithm is very simple to implement with a digital controller and there is no power stage parameter dependency in the controller design. For a post-stage single-phase full-bridge inverter, a PI controller with a feedforward compensation for the inner current control is employed. Furthermore, in case that the operating point of the solar array under varying environmental conditions is higher than the required voltage for the inverter current control, the bypass mode for the boost converter is possible for the more efficient operation. The proposed control scheme is validated through the experiment of the prototype two-stage power conditioning system hardware with a 200W solar array.

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Mitigation of Sub-synchronous Oscillation Caused by Thyristor Controlled Series Capacitor Using Supplementary Excitation Damping Controller

  • Wu, Xi;Jiang, Ping;Chen, Bo-Lin;Xiong, Hua-Chuan
    • Journal of international Conference on Electrical Machines and Systems
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    • v.1 no.2
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    • pp.58-63
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    • 2012
  • The Test Signal Method is adopted to analyze the impact of thyristor controlled series capacitor (TCSC) on sub-synchronous oscillation. The results show that the simulation system takes the risk of Sub-synchronous Oscillation (SSO) while the TCSC is operating in the capacitive region. A supplementary excitation damping controller (SEDC) is used to mitigate SSO caused by the TCSC. A new optimization method which is aimed for optimal phase compensation is proposed. This method is realized by using the particle swarm optimization (PSO) algorithm. The simulation results show that the SEDC designed by this method has superior suitability, and that the secure operation scope of the TCSC is greatly increased.

Design of Digital Controller for Uninterruptible Power Supply Using Disturbance Observer

  • Cho, Jun-Seok;Lee, Seung-Yo;Mok, Hyung-Soo;Choe, Gyu-Ha
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.830-835
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    • 1998
  • This paper describes a new digital control method of 3-phase PWM inverter with LC filter for uninterruptible power supply(UPS). The overall control system is based on the dead beat control, which has the minor loop of current control within the voltage control major loop. In this paper, the full-order disturbance observer is proposed to compensate the disturbances generated due to a sudden change of load currents. The proposed disturbance observer is composed of dead beat observer which estimates state values within a finite time, and cancels the disturbances by adding feedforward compensation loop in the control system. In addition, on order to remove a defect of oscillation generated in output of conventional dead beat controller, a modified dead beat algorithm is proposed in this paper.

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A New Compensation Algorithm for Three-Phase Hybrid Instantaneous Voltage Sag Compensator (3상 하이브리드 순시 전압강하 보상기를 위한 새로운 보상 알고리즘)

  • Yang S.H.;Jung Y.G.;Lim Y.C.;Kim Y.C.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.722-728
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    • 2003
  • 본 연구에서는 3상 하이브리드 순시 전압강하 보상기를 위한 새로운 보상 알고리즘을 제안하였다. 순시 전압강하 보상 알고리즘으로 본 연구에서 제안된 공간 벡터법은 종전의 순시전력이론에 비해 보상 기준치 연산과정을 간략화 할 수 있고 좌표 변환이 필요치 않다. 전력전자전용 시뮬레이터인 PSIM에 의해 제안된 이론의 타당성을 정상상태와 과도상태에서 입증하였다. 그 결과 3상교류 전원 모두에 순간적인 전압 강하가 발생되거나 임의의 상에 왜형 및 전압강하 또는 순간적인 전압 증가가있는 경우에도, 제안된 알고리즘에 의하여 전압 보상이 가능하였으며, 동시에 전원 전류의 고조파 성분 역시 보상 가능하였다.

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Multipath Compensation for BPSK Underwater Acoustic Communication

  • Lin Chun-Dan;Park Ji-Hyun;Yoon Jong Rak
    • The Journal of the Acoustical Society of Korea
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    • v.24 no.3E
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    • pp.99-108
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    • 2005
  • To investigate the equalizer performance in underwater acoustic communication m the presence of intersymbol interference (ISI) due to multipath, computer simulations are carried out in discrete multipath shallow water channels for three different horizontal ranges. For the purpose of computation simplicity, least mean square (LMS) algorithm is adopted both in linear equalizer and nonlinear equalizer, decision feedback equalizer (DFE) to cancel out ISI effects. Binary phase shift keying (BPSK) signals have been transmitted with high data rate of 2000bps through the use of equalization technique. The results demonstrate that equalization is an efficient way to achieve high transmission data rate in the shallow water channel.

Nonlinearity Error Compensation in Heterodyne Laser Interferometer using WLS Method (WLS를 이용한 헤테로다인 레이저 간섭계에서의 비선형 오차 보정)

  • Cha, Hyung-Seok;Lee, Woo-Ram;You, Kwan-Ho
    • Proceedings of the KIEE Conference
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    • 2007.10a
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    • pp.271-272
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    • 2007
  • In heterodyne laser interferometer, we use a phase difference between two beams to calculate target's length. However, there exist an nonlinearity error when measuring length in nanoscale. It is caused from frequency-mixed problem of two polarized beams, called cross talks. This fact limits the usefulness of an laser interferometer. To compensate the error, we propose a WLS(weighted least square) algorithm, which will reduce nonlinearity error and make a better optimization in heterodyne laser interferometer.

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Dead-time compensation algorithm on synchronous frame for 3-phase inverter (3상 인버터를 위한 동기좌표계에서의 위치기반 데드타임 보상알고리즘)

  • Lim, Jeongwoo;Cho, Younghoon
    • Proceedings of the KIPE Conference
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    • 2018.07a
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    • pp.27-29
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    • 2018
  • 본 논문은 상 전류의 위치(전기각)를 기반으로 보상전압을 결정하는 새로운 데드타임 보상알고리즘을 제안한다. 제안하는 알고리즘은 보상전압을 결정하는데 있어, 전류의 극성대신 제어하는 상 전류의 위치(전기각)를 이용하기 때문에 추가적인 알고리즘 없이 간단하게 보상전압을 정의할 수 있다. 또한 제안하는 데드타임 보상알고리즘은 동기좌표계에 바로 적용가능하기 때문에 3상 전압형 인버터(VSIs; Voltage Source Inverters)에 일반적으로 사용되는 동기좌표기반 제어기에 적용이 용이하고 추가적인 변환과정 없이 동기좌표에서의 인버터 출력전압을 추정할 수 있다. 제안하는 데드타임 보상알고리즘의 효과와 성능을 검증하기 위하여 전압형 3상 인버터를 이용한 L-R부하 실험이 진행되었으며, 상 전류파형의 FFT(Fast Fourier Transfrom)와 THD(Total Harmonic Distortion)를 산정하여 정량적 분석을 병행하였다.

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Output Sensing Offset Compensation Algorithm for 3-Phase Grid-connected Inverter (3상 계통 연계형 인버터의 출력 센싱 옵셋 보상 알고리즘)

  • Jang, Ju-Young;Lee, Jeong-Hum;Yang, Seung-Chul;Moon, Sang-Ho
    • Proceedings of the KIPE Conference
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    • 2013.07a
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    • pp.510-511
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    • 2013
  • 3상 인버터 출력단 센싱에 옵셋이 발생할 경우 DC 전류에 출력 주파수에 해당하는 리플 성분이 발생하게 된다. 리플의 크기는 옵셋의 크기에 비례하여 커지게 된다. 센싱 단자 등의 H/W적인 문제로 옵셋이 발생할 경우 DQ축 전류 및 DC 전류에 리플이 발생하게 되고 이는 필터 리액터, 변압기 등의 온도 상승 및 IGBT Stack의 온도 상승 등 인버터 시스템에 악영향을 유발시킬 뿐만 아니라 DC 소스원에도 악영향을 발생시킬 가능성이 존재한다. 따라서, 본 논문에서는 옵셋의 영향을 줄여 시스템을 안정적으로 동작시키기 위해 옵셋 보상 방법을 제안하였다.

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Vector Control for the Rotor Resistance Compensation of Induction Motor (유도전동기 회전자 저항 보상을 위한 벡터제어)

  • 박현철;이수원;김영민;황종선
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.65-68
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    • 2001
  • In the vector control methods of induction motor, the stator current is divided into the flux and torque component current. By controlling these components respectively, the methods control independently flux and torque as in the DC motor and improve the control effects. To apply the vector control methods, the position of the rotor current is identified. The indirect vector control use the parameters of the machine to identify the position of rotor flux. But due to the temperature rise during machine operation, the variation of rotor resistance degrades the vector control. To solve the problem, the q-axis is aligned to reference frame without phase difference by comparing the real flux component with the reference flux component. Then to compensate the slip, PI controller is used. The proposed method keeps a constant slip by compensating the gain of direct slip frequency when the rotor resistance of induction motor varies. To prove the validations of the proposed algorithm in the paper, computer simulations is executed.

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Low-power Frequency Offset Synchronization for IEEE 802.11a Using CORDIC Algorithm (CORDIC을 이용한 IEEE 802.11a용 저전력 주파수 옵셋 동기화기)

  • Jang, Young-Beom;Han, Jae-Woong;Hong, Dae-Ki
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.2
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    • pp.66-72
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    • 2009
  • In this paper, an efficient frequency offset synchronization structure for OFDM(Orthogonal Frequency Division Multiplexing) is proposed. Conventional CORDIC(Coordinate Rotation Digital Computer) algorithm for frequency offset synchronization utilizes two CORDIC hardware i.e., one is vector mode for phase estimation, the other is rotation mode for compensation. But proposed structure utilizes one CORDIC hardware and divider. Through simulation, it is shown that hardware implementation complexity is reduced compared with conventional structures. The Verilog-HDL coding and front-end chip implementation results for the proposed structure show 22.1% gate count reduction comparison with those of the conventional structure.