• Title/Summary/Keyword: Performance isolation

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Validation of Launch Vibration Isolation Performance of the Passive Vibration Isolator for the Scientific Payload BioCabinet for CAS500-3 (차세대중형위성 3호 과학탑재체 바이오캐비넷용 수동형 진동절연기의 발사진동 저감성능 검증)

  • Dong-Jae Seo;Yeon-Hyeok Park;Young-Jin Lee;Ji-Seung Lee;Kyung-Hee Kim;Soon-Hee Kim;Chan-Hum Park;Hyun-Ung Oh
    • Journal of Aerospace System Engineering
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    • v.18 no.4
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    • pp.81-88
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    • 2024
  • The payload BioCabinet of CAS500-3 is designed for 3D stem cell differentiation, culture, and analysis utilizing bio 3D printing techniques in space. The 3D printing technique was initially developed for orbital use; however, it lacks separate validation for extreme launch vibration environments, necessitating a design that mitigates the launch load on the payload. This paper proposes a passive vibration isolator with a low-stiffness elastic support structure and high damping characteristics to reduce the launch loads affecting the BioCabinet. We explore the high-damping characteristics through the superelastic effects of SMA (Shape Memory Alloys) and a multi-layered structure incorporating viscoelastic tape. The effectiveness of the proposed vibration isolation system was confirmed via launch vibration tests on a qualification model.

Serial Communication-Based Fault Diagnosis of a BLDC Motor Using Bayes Classifier

  • Suh, Suhk-Hoon;Woo, Kwang-Joon
    • International Journal of Control, Automation, and Systems
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    • v.1 no.3
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    • pp.308-314
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    • 2003
  • This paper presents a serial communication based fault diagnosis scheme for a brushless DC (BLDC) motor using parameter estimation and Bayes classifier. The presented scheme consists of a smart network board, and a fault detection and isolation (FDI) master. The smart network board is installed near the BLDC motor drive system to acquire motor data and transmit motor data to the FDI-master via serial communication channel. The FDI-master estimates BLDC motor resistance to detect symptom of faults, and assign symptom to fault type using Bayes classifier. In this scheme, since communication time delay has a serious effect on performance, periodic and fixed communication protocol is designed. Hence, the delay time is priory known. By experiment result, presented scheme was verified.

Free Vibration Test for Base Isolated Real Size One Bay-Two Story Steel Frame (면진된 실대형 일경간-이층 철골조 자유진동 실험)

  • 김대곤
    • Proceedings of the Earthquake Engineering Society of Korea Conference
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    • 2000.04a
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    • pp.391-398
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    • 2000
  • To evaluate the seismic performance of a base isolated building accurate analytical model should be selected. The analytical results such as reduced accelerations member forces and relative displacements of the superstructure of the base isolated building are only meaningful when the analytical model is close enough to the real structure. Real size one bay-two story steel frame and two kinds of seismic isolators(laminated elastomeric bearing and lead-rubber bearing) are designed. manufactured and constructed in the laboratory. Free vibration tests using fuse bars were conducted to evaluate the change of dynamic characteristics(period and damping) before and after base isolation of the steel frame. The experimental results of free vibration tests were also used as a bench mark for adjusting the selected analytical modeling to real base isolated steel frame.

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Design of Hybrid Electromagnetic Actuator against Microvibration (미진동 저감을 위한 복합형 전자기식 액추에이터 설계)

  • Moon, S.J.;Choi, S.M.;Jeong, J.A.;Kim, C.H.
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2009.10a
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    • pp.299-304
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    • 2009
  • A hybrid electromagnetic actuator with an air spring is designed so as to achieve the desired isolation reduce the vibration efficiency on the floor vibration. The performance specification of the hybrid electromagnetic actuator is determined based on the vibration criterion for vibration-sensitive equipment. In basic design stage of the electromagnetic actuator, the simple reluctance method is adapted to analyze magnetic circuits. The result is verified by finite element analysis using ANSYS Emag. Finally, some design parameters are optimized under several constraint conditions. Through this study, the design procedure for a specific electromagnetic actuator is set up using a simple reluctance method.

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Functionally Integrated Nonsaturating Logic Elements (기능상 집적된 비포화 논리소자)

  • Kim, Wonchan
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.1
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    • pp.42-45
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    • 1986
  • This paper introduces novel functionally integrated logic elements which are conceptuallized for large scale integrated circuits. Efforts are made to minimize the gate size as well as to reduce the operational voltage, without sacrificing the speed performance of the gates. The process used was a rather conventional collector diffusion isolation(CDI) process. New gate structures are formed by merging several transistors of a gate in the silicon substrate. Thested elements are CML(Current Mode Logic) and EECL (Emitter-to-Emitter Coupled Logic)gates. The obtained experimental results are power-delay product of 6~11pJ and delay time/gate of 1.6~1.8 ns, confirming the possibility of these novel gate structures as a VLSI-candidate.

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Implementation of a ZVS Three-Level Converter with Series-Connected Transformers

  • Lin, Bor-Ren
    • Journal of Power Electronics
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    • v.13 no.2
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    • pp.177-185
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    • 2013
  • This paper studies a soft switching DC/DC converter to achieve zero voltage switching (ZVS) for all switches under a wide range of load condition and input voltage. Two three-level PWM circuits with the same power switches are adopted to reduce the voltage stress of MOSFETs at $V_{in}/2$ and achieve load current sharing. Thus, the current stress and power rating of power semiconductors at the secondary side are reduced. The series-connected transformers are adopted in each three-level circuit. Each transformer can be operated as an inductor to smooth the output current or a transformer to achieve the electric isolation and power transfer from the input side to the output side. Therefore, no output inductor is needed at the secondary side. Two center-tapped rectifiers connected in parallel are used at the secondary side to achieve load current sharing. Due to the resonant behavior by the resonant inductance and resonant capacitance at the transition interval, all switches are turned on at ZVS. Experiments based on a 1kW prototype are provided to verify the performance of proposed converter.

Multi-output VC-TCXO for WCDMA(UMTS) (WCDMA(UMTS)용 다중출력 VC-TCXO)

  • Jeong, Chan-Yong;Lee, Hai-Young
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.841-844
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    • 2005
  • Multi-output VC-TCXO (Voltage Controlled-Temperature Compensated Crystal Oscillator) for WCDMA has integrated the additional CMOS inverter, so it can be normal clipped sinewave output and additional CMOS output and it can be satisfied the VC-TCXO Characteristics that WCDMA system required. In this paper, however 26MHz is used for reference frequency, similarly and practically, it is usable from 10MHz to 40MHz, Most important factor to integrate CMOS inverter internally is the isolation between normal output and additional output. For this, it is separated in package design, due to this, when it isn't used additional output, it shows the same electrical performance, when it is used additional output, it has minimum-rized the interference. and then the important characteristics in reference oscillator are met to WCDMA system's requirements, like phase noise and frequency short term stability.

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Design of Wilkinson Power Divider for nth Harmonic Suppression (고조파 제거 기능을 갖는 윌킨슨 전력분배기의 설계)

  • Kim, Jong-Sung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.1
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    • pp.42-46
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    • 2014
  • A modified network to suppress the nth harmonics in a Wilkinson power divider is presented. The solution has been found by adding transmission lines, whose electrical lengths are determined by using the suppression terms, between two transformers of the traditional design. Experimental results show the second and third harmonics levels achieved are -45.3 and -46.4 dB, respectively, while the performance of the power divider at the fundamental frequency is maintained.

Compact Wilkinson Power Divider Design and Fabrication Using IPD Technology

  • Li, De-Zhong;Wang, Cong;Kyung, Gear Inpyo;Kim, Nam-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.406-407
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    • 2009
  • In this paper, presents the Wilkinson power divider used integrated passive device (IPD) technology with excellent performance for personal communication services (PCS). The insertion loss of this power divider is 0.4 dB and the port isolation greater than 25 dB over the entire band. Return losses input and output ports are 18 dB and 19 dB, respectively. The power divider based on SI-GaAs substrate is designed within die size of about $0.775\times0.53\;mm^2$.

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Compact Wilkinson Power Combiner Design and Electro Magnetic Simulation Using IPD Technology (IPD 기술을 이용한 Wilkinson 전력결합기 설계 및 전기장 시뮬레이션)

  • Cho, Sung-Jin;Wang, Cong;Kim, Nam-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.46-47
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    • 2009
  • In this paper, a power combiner using IPD process for SK Telecom 3-Generation (2.13 ~ 2.15 GHz) application. The Integrated Passive Device (IPD) Wilkinson power Combiner shows compact size and high performance. It is simulated by 3D Electro Magnetic (EM) simulation because of more accurate measurement result wire-bonding effects. This combiner exhibit size of $1.2mm^2$ the insertion loss of 3.6 dB, and the return loss of 10.1 dB, and isolation of more than -7.7 dB.

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