• International Journal of Contents
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• 제3권2호
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• pp.25-29
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• 2007

In this paper, we discuss the mesh segmentation problem which divides a given 3D mesh into several disjoint sets. To solve the problem, we propose a greedy method based on the merging priority metric defined for representing the geometric properties of meaningful parts. The proposed priority metric is a weighted function using five geometric parameters, those are, a distribution of Gaussian map, boundary path concavity, boundary path length, cardinality, and segmentation resolution. In special, we can control by setting up the weight values of the proposed geometric parameters to obtain visually better mesh segmentation. Finally, we carry out an experiment on several 3D mesh models using the proposed methods and visualize the results.

• 한국HCI학회:학술대회논문집
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• 한국HCI학회 2006년도 학술대회 1부
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• pp.902-908
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• 2006

We propose a scheme for more efficient navigation in a hierarchical file system. In the proposed scheme, a program running in the background computes the degree of relationship between a current file and others, and builds a list of the most related files. The current relationship metric being used by the program is a linear combination of five parameters: the name, the directory path, the type, the created time, and the last accessed time of a file. A simulated annealing algorithm is used in order to determine the weighting factors of the parameters. A set of experiments were conducted in order to access the effectiveness of the proposed scheme.

• 한국정보통신학회논문지
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• 제6권1호
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• pp.36-40
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• 2002

Routing algorithm uses metric to choose the route of Least cost to destination network, the best suited routing investigates all routes to the shortest destination among networks and is decided on the route given the minimum metric. This paper analyzed packet flow for setting up the best fitted path on the same network using RIP and EIGRP as the distance vector algorithm and measured the Link-efficiency.

• 한국인터넷방송통신학회논문지
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• 제10권5호
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• pp.201-208
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• 2010

이동 Ad Hoc(MANET) 망은 노드들의 이동성으로 말미암아 망 구조가 수시로 바뀌는 동적인 특성을 가지고 있으며 이는 망의 성능 평가나 프로토콜 설계에 많은 도전적인 문제를 야기한다. 우리는 이동성이 망의 성능에 미치는 성능 측도로서 총 경로 붕괴시간, $\sum_{i}T_i$가 개별 연결뿐만 아니라 시스템 전체의 성능을 평가하는 측도로 사용될 수 있음을 보았다. 본 논문에서는 총 경로 붕괴시간 측도를 세 가지 다른 이동성 모델(Random Waypoint, Manhattan, Blocked Manhattan)에 적용하여 각 이동성 모델의 성능을 평가하고, 패킷 전달율, 종단 간 지연 등이 이동성 모델에 따라 왜 달라지는지를 규명하였다. 또한 AODV 라우팅 프로토콜 하에서 경로 붕괴에도 불구하고 AODV Buffer가 패킷전달율을 어떻게 높이고 종단 간 지연을 얼마만큼 증가 시키는지를 해석적으로 분석하였다.

• 한국수학교육학회지시리즈B:순수및응용수학
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• 제20권4호
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• pp.269-276
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• 2013

We find an explicit $C^{\infty}$-continuous path of Riemannian metrics $g_t$ on the 4-d hyperbolic space $\mathbb{H}^4$, for $0{\leq}t{\leq}{\varepsilon}$ for some number ${\varepsilon}$ > 0 with the following property: $g_0$ is the hyperbolic metric on $\mathbb{H}^4$, the scalar curvatures of $g_t$ are strictly decreasing in t in an open ball and $g_t$ is isometric to the hyperbolic metric in the complement of the ball.

• 한국경영과학회지
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• 제14권1호
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• pp.72-79
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• 1989

In this paper we consider the problem of finding an optimal straight line path of moving facility which interacts with a set of existing facilities fixed within a given rectangular area. We present a simple algorithm for rectilinear metric which greatly improves the pervious method and also propose algorithms for Euclidean and squared Euclidean distances.

• 한국통신학회논문지
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• 제21권8호
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• pp.2077-2089
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• 1996

In this paper, a memory organization and its control method are proposed for the implementation of parallel Virterbi decoders. The design is mainly focused on lowering the hardware complexity of a parallel Viterbi decoder which is to reduce the decoding speed. The memories requeired in a Viterbi decoder are the SMM(State Metric Memory) and the TBM(Traceback Memory);the SMM for storing the path metrics of states and the TBM for storing the survial path information. A general parallel Viterbi decoder for high datarate usually consists of multiple ACS (Add-Compare-Select) units and their corresponding memeory modules.for parallel ACS units, SMMs and TBMs are partitioned into smaller independent pairs of memory modules which are separately interleaved to provide the maximum processing speed. In this design SMMs are controlled with addrss generators which can simultaneously compute addresses of the new path metrics. A bit shuffle technique is employed to provide a parallel access to the TBMs to store the survivor path informations from multiple ACS modules.

• International Journal of Control, Automation, and Systems
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• 제2권1호
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• pp.107-117
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• 2004

A new algorithm for planning a collision-free path based on an algebraic curve as well as the concept of path space is developed. Robot path planning has so far been concerned with generating a single collision-free path connecting two specified points in a given robot workspace with appropriate constraints. In this paper, a novel concept of path space (PS) is introduced. A PS is a set of points that represent a connection between two points in Euclidean metric space. A geometry mapping (GM) for the systematic construction of path space is also developed. A GM based on the 2$^{nd}$ order base curve, specifically Bezier curve of order two is investigated for the construction of PS and for collision-free path planning. The Bezier curve of order two consists of three vertices that are the start, S, the goal, G, and the middle vertex. The middle vertex is used to control the shape of the curve, and the origin of the local coordinate (p, $\theta$) is set at the centre of S and G. The extreme locus of the base curve should cover the entire area of actual workspace (AWS). The area defined by the extreme locus of the path is defined as quadratic workspace (QWS). The interference of the path with obstacles creates images in the PS. The clear areas of the PS that are not mapped by obstacle images identify collision-free paths. Hence, the PS approach converts path planning in Euclidean space into a point selection problem in path space. This also makes it possible to impose additional constraints such as determining the shortest path or the safest path in the search of the collision-free path. The QWS GM algorithm is implemented on various computer systems. Simulations are carried out to measure performance of the algorithm and show the execution time in the range of 0.0008 ~ 0.0014 sec.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.2237-2242
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• 2005

The original RRT is iteratively expanded by applying control inputs that drive the system slightly toward randomly-selected states, as opposed to requiring point-to-point convergence, as in the probabilistic roadmap approach. It is generally known that the performance of RRTs can be improved depending on the selection of the metrics in choosing the nearest vertex and bias techniques in choosing random states. We designed a path planning algorithm based on the RRT method for a remote-controlled mobile robot. First, we considered a bias technique that is goal-biased Gaussian random distribution along the command directions. Secondly, we selected the metric based on a weighted Euclidean distance of random states and a weighted distance from the goal region. It can save the effort to explore the unnecessary regions and help the mobile robot to find a feasible trajectory as fast as possible. Finally, the constraints of the actuator should be considered to apply the algorithm to physical mobile robots, so we select control inputs distributed with commanded inputs and constrained by the maximum rate of input change instead of random inputs. Simulation results demonstrate that the proposed algorithm is significantly more efficient for planning than a basic RRT planner. It reduces the computational time needed to find a feasible trajectory and can be practically implemented in a remote-controlled mobile robot.

• 한국정보통신학회논문지
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• 제7권3호
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• pp.384-389
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• 2003

새로운 two-step SOVA 복호기 구조가 제안된다. Trace-back단의 survivor memory에 dual-port RAM 개념이 적용되어, 기존 two-step SOVA 방식에 비해서 복호 지연의 현격한 감소가 가능해진다. Path metric 차이의 절대값이 ACS단 내부에서 계산됨으로써, 기존 two-step SOVA 방식에 비해 시스템의 복잡성이 크게 줄어든다. 제안된 SOVA 복호기 구조는 verilog HDL로 기술되어 동작 시뮬레이션을 거쳐 구조의 타당성이 검증되었으며, FPGA로 구현되었다. 구현된 SOVA복호기는 종래의 비터비 복호기에 가까운 데이터 처리율을 보여주었으며, 구현에 사용된 FPGA 소자 자원은 종래의 비터비 복호기의 약 1.5배 정도이다.