• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.824-831
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• 2014

In this study, structural variations and overlay errors caused by multiple patterning lithography techniques to print narrow parallel metal interconnects are investigated. Resistance and capacitance parasitic of the six lines of parallel interconnects printed by double patterning lithography (DPL) and triple patterning lithography (TPL) are extracted from a field solver. Wide parameter variations both in DPL and TPL processes are analyzed to determine the impact on signal propagation. Simulations of 10% parameter variations in metal lines show delay variations up to 20% and 30% in DPL and TPL, respectively. Monte Carlo statistical analysis shows that the TPL process results in 21% larger standard variation in delay than the DPL process. Crosstalk simulations are conducted to analyze the dependency on the conditions of the neighboring wires. As expected, opposite signal transitions in the neighboring wires significantly degrade the speed of signal propagation, and the impact becomes larger in the C-worst metals patterned by the TPL process compared to those patterned by the DPL process. As a result, both DPL and TPL result in large variations in parasitic and delay. Therefore, an accurate understanding of variations in the interconnect parameters by multiple patterning lithography and adding proper margins in the circuit designs is necessary.

• 한국멀티미디어학회논문지
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• 제6권3호
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• pp.419-428
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• 2003

어떤 물체 영역의 골격(skeleton)을 얻기 위해 세건화(thinning)하는 과정에서 잔가지(parasitic branch)가 발생하므로, 이러한 것을 효과적으로 제거하기 위한 여러 가지 연구가 이루어져 왔다. 이중에서 잔가지가 한 픽셀 두께의 가지로 나타나는 속성에 착안하여, 윤곽선 추적에 의한 대칭 경로(symmetric path)를 검출함으로써 잔가지를 제거하는 방법이 매우 효과적인 것을 알 수 있었다. 본 연구에서는, 이 방법을 영상 분할이나 연결 요소 추출 등에 의해 구해진 물체 영역의 윤곽선 부분에 나타나는 잡영가지 (noise branch)를 제거하는데 활용할 수 있도록 개선한 방법을 제안한다. 즉, 한 픽셀 두께의 잡영가지 뿐만 아니라, 부분적으로 두 픽셀 이상이 뭉쳐져 둥그스름한 덩어리(잡영블랍, noise blob)를 형성하고 있는 잡영가지도 제거할 수 있는 개선된 방법을 제안한다. 대칭 경로를 찾기 위해 4-8방향 윤곽선 추적 알고리즘을 이용하며, 잡영블랍이 포함된 경우에는 준대칭(quasi-symmetric) 경로를 정의하여 추출한다. 제안한 방법의 시간 복잡도는 윤곽선 픽셀수의 선형 함수로 표현되며, 사용자가 잡영블랍과 잡영가지의 크기를 임의로 설정하도록 하여 융통성있고 다양하게 잡영가지를 제거할 수 있도록 하였다. 실제 형상과 인위적 형상에 대한 실험을 통해 제안된 방법의 유용성을 확인할 수 있었다.

• 한국정보통신학회논문지
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• 제11권1호
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• pp.7-13
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• 2007

본 논문은 Top-loading한 슬리브 모노폴에 4개의 Post 형태 기생소자를 추가함으로써, 기존의 상용 이동통신 시스템의 주파수를 하나로 통합 할 수 있는 소형이면서, 광대역 특성을 갖는 모노폴 안테나를 설계 및 제작하였다. 각 소자의 Parameter 변화에 따른 반사손실 특성을 관찰하였고, 제안된 안테나의 광대역 특성을 확인하기 위하여 PCS, W-CDMA, WiBro, W-LAN, S-DMB 대역에서의 복사 특성을 살펴보았다. 제안된 안테나는 수평면내 무지향성, 수직면내 8자형의 지향성을 가지며 $1.67{\sim}3.55\;GHz$ 주파수 대역($B/W{\fallingdotsep}72%$) 에서 Return loss$Return\;loss{\leq}-10\;dB$의 양호한 반사손실과 $1.14{\sim}3.66\;dBi$의 이득을 얻을 수 있었다.

• 한국통신학회논문지
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• 제28권8A호
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• pp.650-656
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• 2003

In 1995, a group of representatives from the integrated circuits and computer-aided design industries presented a industry standard bipolar model called the VBIC model. The VBIC model includes the improved Early effect, quasi-saturation, substrate parasitic, avalanche multiplication, and self-heating which are not available in the conventional SGP model. This paper applies VBIC model for SiGe HBT device and develops an accurate and efficient methodology to extract all the DC and AC parameters of the VBIC model for SiGe HBT device at room temperature. Simulated results by the extracted VBIC model parameter are compared with the measurement data and show very good agreement in both DC and s-parameters prediction.

• 한국전자파학회논문지
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• 제29권9호
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• pp.677-684
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• 2018

본 연구는 S-parameter를 이용한 변압기의 고주파 모델링 방법을 제시한다. 1차측과 2차측을 단락 또는 개방 회로를 구성하여 각 상태에서의 반사계수를 Vector Network Analyzer로 측정하였다. 측정 결과로부터 등가회로 소자를 추출하여 고주파 등가회로를 모델링하고, 2-port 회로에서 측정한 S-parameter 측정치와 시뮬레이션 결과를 비교함으로써 타당성을 검증하였다. 이는 정확하고 예측 가능한 고주파 변압기를 설계하는데 적용될 수 있다.

• ETRI Journal
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• 제31권6호
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• pp.741-748
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• 2009

We present an analysis of microstrip coupled lines (MCLs) used to improve the stability of a 60 GHz narrowband amplifier. The circuit has a 4-stage structure implementing MCLs instead of metal-insulator-metal (MIM) capacitors for the unconditional stability of the amplifier and yield enhancement. The stability parameter, U, is used to compare the stability of MCLs with that of MIM capacitors. Experimental results show that MCLs are more stable than MIM capacitors with the same capacitances as MCLs because the parasitic parallel resistances of MCLs are lower than those of MIM capacitors. Moreover, the bandwidth of an amplifier using MCLs is narrower than one using MIM capacitors because the parasitic series inductances of MCLs are higher than those of MIM capacitors.

• Journal of Electrical Engineering and Technology
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• 제8권4호
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• pp.938-944
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• 2013

In this paper, we propose a method for suppressing shaft voltage by modifying the shape of the rotor and the permanent magnets in interior permanent magnet-type-high-voltage motors. Shaft voltage, which is induced by parasitic components and the leakage flux in motor-driven systems, adversely affects their bearings. In order to minimize shaft voltage, we designed a magnet rearrangement and rotor re-structuring of the motor. The shaft voltage suppression effect of the designed model was confirmed experimentally and by comparative finite element analysis.

• Journal of Electrical Engineering and Technology
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• 제10권1호
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• pp.205-215
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• 2015

Common mode (CM) conducted interference are predicted and compared with experiments in a motor drive system of Electric vehicles in this study. The prediction model considers each part as an equivalent circuit model which is represented by lumped parameters and proposes the parameter extraction method. For the modeling of the inverter, a concentrated and equivalent method is used to process synthetically the CM interference source and the stray capacitance. For the parameter extraction in the power line model, a computation method that combines analytical method and finite element method is used. The modeling of the motor is based on measured date of the impedance and vector fitting technique. It is shown that the parasitic currents and interference voltage in the system can be simulated in the different parts of the prediction model in the conducted frequency range (150 kHz-30 MHz). Experiments have successfully confirmed that the approach is effective.

• Journal of information and communication convergence engineering
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• 제6권1호
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• pp.43-46
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• 2008

This paper proposes an advanced test circuit for detecting the connectivity between a drum ring of laser printer and PCB. The detection circuit of charge sharing is proposed, which minimizes the influences of internal parasitic capacitances. The test circuit is composed of precharge circuit, analog comparator, level shifter. Its functional operation is verified using $0.6{\mu}m$ 3.3V/40V CMOS process parameter by HSPICE. Access time is100ns. Layout of the drum contact test circuit is $465{\mu}m\;{\times}\;117{\mu}m$.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2000년도 종합학술발표회 논문집 Vol.10 No.1
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• pp.248-251
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• 2000

본 논문에서는 SIEMENS사의 BAS125 소자의 I-V curve에서 RF신호를 고려하여 파라미터를 추출하였으며, 바이어스에 독립적인 외부소자를 추출하고, 바이어스에 종속적인 접합캐패시터를 S-parameter를 fitting하여 추출하였다.