• 전자공학회논문지D
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• 제34D권2호
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• pp.1-9
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• 1997

For the reduction of parasitic inductance and matching of bonding wire in the package of microwave devices, we propose multiple bonding wires buried in a dielectric material of FR-4 composite. This structure is analyzed using the method of moments (MoM) and compared with the common bondwires and ribbon interconnections. The FR-4 composite is modelled by the cole-cole model which can consider the loss and the variation of the permittivity in a frequency. At 20 GHz, the parasitic reactance is reduced by 90%, 80%, 60% compared to those of a single bonding wire in air, double bonding wires in air and ribbon interconnection in air, respectively. Also, the new bondwire shows very good matching of 60.ohm characteristic impedance and has 15dB, 10dB, 5dB improvement of the return loss and 2.5dB, 0.7dB, 0.2dB improvement of the insertion loss compared to the common interconnections. This technique can minimize the parasitic effect of bondwires in microwave device packaging.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2004년도 ICCAS
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• pp.466-469
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• 2004

In this paper, we improve the matching impedance of antennas by inserting parasitic slots on the ground plane of right-angle triangular slot antennas. The designed antennas characteristics are analyzed by using Finite Different Time Domain (FDTD) method, the specific design frequency is 10 GHz and match impedance is 50 ohms. Simulation results show that the efficient of return loss and radiation patterns are improved and enhance. In this case, the right-angle triangular slot antennas with parasitic slots have matching impedance better than antennas without parasitic slots.

• Journal of Power Electronics
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• 제16권1호
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• pp.374-387
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• 2016

This paper derives an improved analytical model to estimate switching loss and analyze the effects of parasitic elements on the switching performance of SiC MOSFETs. The proposed analytical model considers the parasitic inductances, the nonlinearity of the junction capacitances and the nonlinearity of the trans-conductance. The turn-on process and the turn-off process are illustrated in detail, and equivalent circuits are derived and solved for each switching transition. The proposed analytical model is more accurate and matches better with experimental results than other analytical models. Note that switching losses calculated based on experiments are imprecise, because the energy of the junction capacitances is not properly disposed. Finally, the proposed analytical model is utilized to account for the effects of parasitic elements on the switching performance of a SiC MOSFET, and the circuit design rules for high frequency circuits are given.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 추계학술대회 논문집 학회본부 A
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• pp.64-66
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• 1999

High-speed motors using permanent magnet have various merits; high efficiency, high power density, and small size. While they have merits, we have to solve some problems. First of all, we have to reduce loss, cause of heat, to realize high speed operation. The loss be composed of copper loss, iron loss, and parasitic rotor loss. Iron loss and parasitic rotor loss is proportional to frequency, square of frequency, respectively.

• Journal of Power Electronics
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• 제19권2호
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• pp.591-601
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• 2019

With the development of renewable energy, grid-connected inverter technology has become an important research area. When compared with traditional silicon IGBT power devices, the silicon carbide (SiC) MOSFET shows obvious advantages in terms of its high-power density, low power loss and high-efficiency power supply system. It is suggested that this technology is highly suitable for three-phase AC motors, renewable energy vehicles, aerospace and military power supplies, etc. This paper focuses on the SiC MOSFET behaviors that concern the parasitic component influence throughout the whole working process, which is based on a three-phase grid-connected inverter. A high-speed model of power switch devices is built and theoretically analyzed. Then the power loss is determined through experimental validation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.433-434
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• 1988

Rectangular microstrip antenna with parasitic element is analyzed. Radiation admittance and equivalent circuit parameters between rectangular microstrip antenna and parasitic element are obtained by using equivalent ${\pi}$-network parameters of the slit in the wall of the parallel plate waveguide filled with homogeneous dielectric. The return loss is calculated and measured as a function of frequency with gap width 0.5mm between the patch and parasitic element. The experimental results are in fairly agreement with calculated values.

• 한국정보통신학회논문지
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• 제20권5호
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• pp.874-879
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• 2016

본 논문에서는 직사각형 및 삼각형 기생 패치를 이용한 광대역 마이크로스트립 패치 안테나를 제안하였다. 직사각형 마이크로스트립 패치 위에 직사각형 및 삼각형 모양의 기생 패치들을 적층하여 860MHz대역에서 광대역 특성을 얻었다. 주 방사부인 마이크로스트립안테나와 기생 패치와의 효과적인 결합은 이들 사이에 두꺼운 공기층을 두어 구현하였다. 또한, 이들 공기층 두께와 기생 패치의 위치는 광대역 정합에 중요한 요소임을 알 수 있었다. 제안된 안테나는 향후 소형 트랜시버에 적용하기 위해 $119mm{\times}109mm$ 크기의 소형 접지면 위에 설계 및 제작되었다. FR4기판에 제작된 안테나의 임피던스 대역은 818~919MHz(11.7%)이다. 방사패턴은 기존 마이크로스트립 패치 안테나와 유사했으며, 최대 이득은 주파수 824MHz에서 2.11dBi로 측정되었다.

• 한국정보통신학회논문지
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• 제11권1호
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• pp.7-13
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• 2007

본 논문은 Top-loading한 슬리브 모노폴에 4개의 Post 형태 기생소자를 추가함으로써, 기존의 상용 이동통신 시스템의 주파수를 하나로 통합 할 수 있는 소형이면서, 광대역 특성을 갖는 모노폴 안테나를 설계 및 제작하였다. 각 소자의 Parameter 변화에 따른 반사손실 특성을 관찰하였고, 제안된 안테나의 광대역 특성을 확인하기 위하여 PCS, W-CDMA, WiBro, W-LAN, S-DMB 대역에서의 복사 특성을 살펴보았다. 제안된 안테나는 수평면내 무지향성, 수직면내 8자형의 지향성을 가지며 $1.67{\sim}3.55\;GHz$ 주파수 대역($B/W{\fallingdotsep}72%$) 에서 Return loss$Return\;loss{\leq}-10\;dB$의 양호한 반사손실과 $1.14{\sim}3.66\;dBi$의 이득을 얻을 수 있었다.

• Journal of electromagnetic engineering and science
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• 제7권3호
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• pp.116-121
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• 2007

Novel design of a wideband monopole antenna for DVB-H service is presented. The proposed antenna is designed based on a monopole antenna. It consists of folded monopole and parallel parasitic element. The folded segment of the folded monopole makes the antenna shorter. The length of the parasitic element obtains additional resonance frequencies. The gap distance between the folded monopole and the parasitic element is a key parameter to control impedance matching for wideband operation. The antenna has wide band performance, good impedance and radiation characteristics from 470 MHz to 870 MHz. The measured return loss for operating frequencies over DVB-H band is better than 10 dB. Good radiation patterns are also obtained. The measured results are compared with calculated results using Ansoft HFSS(High Frequency Structure Simulator).

• 전기학회논문지
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• 제67권4호
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• pp.538-542
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• 2018

In order to generate a clock source with low cost and high performance in system on chip(SoC), a relaxation oscillator with stable output characteristics according to PVT(process, voltage and temperature) fluctuation require a low area and a low power. In this paper, we propose a solution to reduce the current loss caused by parasitic components in the conventional relaxation oscillator. Since the slew rate of the bias current and the capacitor are adjusted to be the same through the proposed solution, a relaxation oscillator with low area characteristics is designed for the same clock source frequency implementation. The proposed circuit is designed using the TSMC CMOS 0.18um process. The Simulation results show that the relaxation oscillator using the proposed solution can prevent the current loss of about $279{\mu}A$ and reduce the total chip area by 20.8% compared with the conventional oscillator in the clock source frequency of 96 MHz.